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V58C2128804S 参数 Datasheet PDF下载

V58C2128804S图片预览
型号: V58C2128804S
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能2.5伏128兆位的DDR SDRAM [HIGH PERFORMANCE 2.5 VOLT 128 Mbit DDR SDRAM]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 59 页 / 922 K
品牌: MOSEL [ MOSEL VITELIC, CORP ]
 浏览型号V58C2128804S的Datasheet PDF文件第44页浏览型号V58C2128804S的Datasheet PDF文件第45页浏览型号V58C2128804S的Datasheet PDF文件第46页浏览型号V58C2128804S的Datasheet PDF文件第47页浏览型号V58C2128804S的Datasheet PDF文件第49页浏览型号V58C2128804S的Datasheet PDF文件第50页浏览型号V58C2128804S的Datasheet PDF文件第51页浏览型号V58C2128804S的Datasheet PDF文件第52页  
V58C2128(804/404/164)S  
Figure 38 - INITIALIZE AND MODE REGISTER SETS  
VDD  
VDDQ  
t
VTD  
VTT  
(system*)  
VREF  
t
CK  
t
t
CL  
CH  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
/CK  
CK  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
t
t
IH  
IS  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
CKE  
LVCMOS LOW LEVEL  
((  
))  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
t
t
IS IH  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
COMMAND  
DM  
NOP  
PRE  
EMRS  
MRS  
PRE  
AR  
AR  
MRS  
ACT  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
t
t
t
t
IS IH  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
A0-A9, A11  
A10  
CODE  
CODE  
CODE  
CODE  
CODE  
RA  
RA  
BA  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
t
IS IH  
( (  
) )  
( (  
) )  
ALL BANKS  
ALL BANKS  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
CODE  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
t
t
t
t
IS IH  
IS IH  
t
IS IH  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
BA0=H,  
BA1=L  
BA0=L,  
BA1=L  
BA0=L,  
BA1=L  
BA0, BA1  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
( (  
) )  
High-Z  
((  
))  
((  
))  
((  
))  
((  
))  
((  
))  
((  
))  
DQS  
DQ  
High-Z  
((  
))  
((  
))  
((  
))  
((  
))  
((  
))  
((  
))  
T = 200µs  
t
t
t
t
t
t
MRD  
MRD  
MRD  
RP  
RFC  
RFC  
Power-up:  
VDD and  
CLK stable  
Extended  
Mode  
Register  
Set  
200 cycles of CLK**  
Load  
Mode  
Register  
(with A8 = L)  
Load  
Mode  
Register,  
Reset DLL  
(with A8 = H)  
DON'T CARE  
*
= VTT is not applied directly to the device, however tVTD must be greater than or equal to zero to avoid device latch-up.  
** = tMRD is required before any command can be applied, and 200 cycles of CK are required before a READ command can be applied.  
The two Auto Refresh commands may be moved to follow the first MRS, but precede the second PRECHARGE ALL command.  
V58C2128(804/404/164)S Rev. 1.6 March 2002  
48  
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