V58C2128(804/404/164)S
Figure 38 - INITIALIZE AND MODE REGISTER SETS
VDD
VDDQ
t
VTD
VTT
(system*)
VREF
t
CK
t
t
CL
CH
( (
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( (
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( (
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( (
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( (
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( (
) )
/CK
CK
( (
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( (
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( (
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( (
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( (
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( (
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t
t
IH
IS
( (
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( (
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( (
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( (
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( (
) )
CKE
LVCMOS LOW LEVEL
((
))
( (
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( (
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( (
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( (
) )
( (
) )
t
t
IS IH
( (
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( (
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( (
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( (
) )
( (
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( (
) )
COMMAND
DM
NOP
PRE
EMRS
MRS
PRE
AR
AR
MRS
ACT
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( (
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( (
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( (
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( (
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( (
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( (
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( (
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t
t
t
t
IS IH
( (
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( (
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( (
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( (
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( (
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( (
) )
A0-A9, A11
A10
CODE
CODE
CODE
CODE
CODE
RA
RA
BA
( (
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( (
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( (
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( (
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( (
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( (
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t
IS IH
( (
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( (
) )
ALL BANKS
ALL BANKS
( (
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( (
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( (
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CODE
( (
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( (
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( (
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t
t
t
t
IS IH
IS IH
t
IS IH
( (
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( (
) )
( (
) )
( (
) )
BA0=H,
BA1=L
BA0=L,
BA1=L
BA0=L,
BA1=L
BA0, BA1
( (
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( (
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( (
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( (
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( (
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( (
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High-Z
((
))
((
))
((
))
((
))
((
))
((
))
DQS
DQ
High-Z
((
))
((
))
((
))
((
))
((
))
((
))
T = 200µs
t
t
t
t
t
t
MRD
MRD
MRD
RP
RFC
RFC
Power-up:
VDD and
CLK stable
Extended
Mode
Register
Set
200 cycles of CLK**
Load
Mode
Register
(with A8 = L)
Load
Mode
Register,
Reset DLL
(with A8 = H)
DON'T CARE
*
= VTT is not applied directly to the device, however tVTD must be greater than or equal to zero to avoid device latch-up.
** = tMRD is required before any command can be applied, and 200 cycles of CK are required before a READ command can be applied.
The two Auto Refresh commands may be moved to follow the first MRS, but precede the second PRECHARGE ALL command.
V58C2128(804/404/164)S Rev. 1.6 March 2002
48