PDSP16256
When the filter length is less than the maximum, the
PDSP16256 will only transfer the correct number of
coefficients, and one or more significant address bits
willremainlow.Sufficientcoefficientsarealwaysloaded
to allow for a possible Bank Swap to occur, and the
EPROM allocation must allow for this even if the
feature is not to be used. Table 5 shows the number of
coefficients loaded for each of the modes.
These coded inputs always correspond to the block
address used for the segment of EPROM allocated to
thatdevice. Code‘allzeros’mustnotbeusedsincethe
Master device has implied use of the bottom segment.
This is necessary since the C11:8 pins are alterna-
tively used on the Master device to define the number
of devices supported by the EPROM.
In addition to providing the most significant addresses
to the EPROM, the C15:12 address outputs from the
masterdevicemustalsodrivetheC15:12inputsonthe
slave devices. These C15:12 inputs are internally
compared to the C11:8 inputs to decide if that device
is currently to be loaded. This approach avoids the
need for external decoders and makes the CS input
redundant. This input, however, must be tied low on
every device in an EPROM supported system.
If several devices are cascaded, only one device
assumestheroleoftheMasterbyhavingits
pin
EPROM
grounded. It produces a
signal for the other de-
WEN
vices,plusfourhigherorderaddressoutputsonC15:12,
see Fig. 16. The extra address bits on C15:12 define
separate areas of EPROM, containing coefficients for
up to fifteen additional devices. The least significant
block of memory must always be allocated to the
Master device. The additional devices need not in
practice be all part of the same cascaded chain, but
can consist of several independent filters. They must,
The Control Coefficient pin (CCS) is used to define
whenthecontrolregisteristobeloaded.Itbecomesan
outputontheMasterdevicewhichprovidesanEPROM
address bit next in significance above A7:0, and also
drivestheCCSinputsontheslavedevices.Thisoutput
is high for the first two EPROM transfers in order to
access the control information, and then remains low
whilstthecoefficientsareloaded. Thiscontrolinforma-
tionisthusnotstoredadjacenttothecoefficientswithin
the EPROM, and in fact the EPROM must provide
twice the storage necessary to contain the coefficients
alone. All but two of the bytes in the additional half are
redundant. See Fig.17 for the EPROM memory map.
however, all havetheir
pins tied low. FRUN can
BYTE
still be used to start these independent filters after all
the devices have been loaded. In this case, however,
eachslaveFENpinshouldbedrivenbyDFENfromthe
master device.
WhenoneEPROMissupplyinginformationforseveral
devices, some means of selectively enabling each
additional device must be provided. This is achieved
by using the C11:8 pins on the slave devices as binary
coded inputs to define one to fifteen extra devices.
COEFFICIENTS
PER DEVICE
Control
Register
Number of
Coefficients
Loaded
32
64
128
14 13 12
255
511
1023
NOT USED
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
32
64
64
128
128
194
193
192
191
386
385
384
383
770
769
768
767
CONTROL REG
DEVICE 2
FILTER
COEFFICIENTS
128
128
128
127
256
255
512
511
Invalid Mode
NOT USED
Table 5. Number of coefficients loaded
66
65
64
63
130
129
128
127
258
257
256
255
NOTE:
The EPROM memory map assumes that, for the 32 and 64
coefficient per device options, the unused address pins are
unconnected. If all address pins are connected as shown in
Fig. 16 then the 128 coefficients per device memory map
columnshouldbeused.Onlythosecoefficientsrequiredwillbe
read,hencetheupperportionsofthecoefficientaddressspace
will be ignored.
CONTROL REG
DEVICE 1
FILTER
COEFFICIENTS
0
0
0
Figure. 17 EPROM Memory Map
15
MITEL [ MITEL NETWORKS CORPORATION ]
