PDSP16256
RESULTS
OUT
FEN
DB15:0
FEN
F31:0
INTERFACE
DEVICE
DA15:0 DFEN X31:0
DB15:0
FEN
F31:0
INTERMEDIATE
DEVICE
DA15:0 DFEN X31:0
DB15:0
FEN
F31:0
TERMINATION
DEVICE
DA15:0 DFEN X31:0
DATA IN
Figure. 13 Full speed cascaded system
128 TAP
64 TAP
32 TAP
16 TAP
127
127
127
127
UPPER
BANK
NOT USED
NOT USED
64
63
64
63
NO SWAP
POSSIBLE
UPPER
BANK
LOWER
BANK
32
31
32
31
UPPER
BANK
LOWER
BANK
16
15
LOWER
BANK
0
0
0
0
(a) Single Filters
64 TAP
32 TAP
16 TAP
8 TAP
127
127
127
127
B UPPER
BANK
FILTER B
NO SWAP
POSSIBLE
96
95
NOT USED
A UPPER
BANK
NOT USED
64
63
64
63
64
63
B UPPER
A UPPER
48
47
B LOWER
BANK
FILTER A
NO SWAP
POSSIBLE
32
31
32
31
32
31
B UPPER
A UPPER
B LOWER
A LOWER
B LOWER
A LOWER
A LOWER
BANK
16
15
0
0
0
0
(b) Dual Filters
Figure. 14 Coefficient memory map
12