Preliminary Information
MT90810
AC Electrical Characteristics- Clock and Stream Timing
Characteristics
Sym
Min.
Typ.
Max. Units
Test Conditions
Load Cap
=200pF
For all Timing
1
2
3
4
5
6
7
8
9
Data Propagation Delay
Data Setup Time
tPD
tS
0
30
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
30
Data Hold Time
tH
10
Data bit 7 Tristate
tD7
60
90
F0b/FRAME Setup Time
F0b/FRAME Hold Time
F0b/FRAME Pulse Width
CLK8 Period
tFS
50
150
150
300
134
67
tFH
50
tFW
tC8P
tC8H
tC8L
tC4P
tC4H
tC4L
tC2P
tC2H
tC2L
200
110
55
122
61
CLK8 High Width
10 CLK8 Low Width
55
61
67
11 C4b/CLK4 Period
232
110
110
474
220
220
244
122
122
488
244
244
256
134
134
502
268
268
12 C4b/CLK4 High Width
13 C4b/CLK4 Low Width
14 C2o/CLK2 Period
15 C2o/CLK2 High Width
16 C2o/CLK2 Low Width
16 MHz
8 MHz
C4b
t
C4P
t
C4L
t
C4H
t
C2P
C2o
t
t
C2L
C2H
t
t
FH
F0b
FS
t
t
PD
FW
DSO Output
DSI Output
BIT 7*
BIT 6-0
t
D7
t
t
H
S
DSO Input
DSI Input
Note: *MVIP Output streams are high impedance during the first cycle of Bit 7
Figure 13 - MVIP Stream Timing
2-169