MT9074
Advance Information
HDLC Control and Status (Page B for HDLC0 and Page C for HDLC1)
Register
Address
Function
Control (Write/Verify)
Status (Read)
10H(Table 140)
11H(Table 141)
Address Recognition 1
Address Recognition 2
TX FIFO
---
---
ADR16-10,A1EN
ADR26-20, A2EN
BIT7-0
12H (Table
142/143)
RX FIFO
13H(Table 144)
14H(Table 145)
15H(Table 146)
16H(Table 147)
HDLC Control 1
---
---
ADREC, RxEN, TxEN, EOP, FA, Mark-
idle,TR, FRUN
HDLC Status
INTGEN,
Idle-Chan,
RQ9,
RQ8,
TxSTAT2, TxSTAT1, RxSTAT2, RxSTAT1
HDLC Control 2
Interrupt Mask
---
---
INTSEL, CYCLE, TxCRCI,
SEVEN,RxFRST, TxFRST
GaIM, RxEOPIM, TxEOPIM, RxFEIM,
TxFLIM,
FA:TxUNDERIM,
RxFFIM,
RxOVFIM
17H(Table 148)
---
Interrupt Status (*) Ga, RxEOP, TxEOP, RxFE, TxFL,
FA:TxUNDER, RxFF, RxOVF
18H(Table 149)
19H(Table 150)
1AH(Table 151)
1BH(Table 152)
---
Rx CRC MSB
CRC15-CRC8
CRC7-CRC0
TxCNT7-0
---
Rx CRC LSB
TX byte count
Test Control
---
---
HRST, RTLOOP, CRCTST, FTST, ARTST,
HLOOP
1CH(Table 153)
1DH(Table 154)
1EH(Table 155)
---
Test Status
RxCLK, TxCLK, VCRC, VADDR
RSV, RFD2-0,RSV, TFD2-0
RSV, RFFS2-0, RSV, TFLS2-0
HDLC Control 3
HDLC Control 4
---
---
Table 139 - HDLC 0 & 1 Control and Status (Page B & C)
98
MITEL [ MITEL NETWORKS CORPORATION ]
