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MT9074AL 参数 Datasheet PDF下载

MT9074AL图片预览
型号: MT9074AL
PDF下载: 下载PDF文件 查看货源
内容描述: T1 / E1 / J1单芯片收发器 [T1/E1/J1 Single Chip Transceiver]
分类和应用: 电信集成电路
文件页数/大小: 122 页 / 371 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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Advance Information  
MT9074  
Per Channel Receive Signalling (Pages 9 and 0AH) (E1)  
Page 09H, addresses 10001 to 11111, and page 1AH addresses 10001 to 11111 contain the Receive  
Signalling Control Words for CAS channels 2 to 16 and 18 to 32. Table 137 illustrates the mapping between the  
addresses of these pages and the CAS channel numbers. Table 138 describes bit allocation within each of  
these registers.  
Page 9 Address:  
0
0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10 11 12 13 14 15  
10 11 12 13 14 15  
Equivalent PCM 30  
Timeslots  
Page A Address:  
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15  
Equivalent PCM 30  
Timeslots  
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31  
Table 136 - Page 9, A Address Mapping to CAS Channels (E1)  
Bit  
Name  
- - -  
Functional Description  
Unused  
7 - 4  
3 - 0  
A(n)  
B(n)  
C(n)  
D(n)  
Receive Signalling Bits for Channel n. These bits are received on the PCM 30  
2048 kbit/sec. Link in bit positions one to four of time slot 16 in frame n (where n = 1  
to 30) and are the A, B, C, D signalling bits associated with channel n.  
Table 137 - Receive Channel Associated Signalling (Pages 9 and A) (E1)  
Serial per channel receive signalling status bits appear on ST-BUS stream CSTo. Table 139 describes the bit  
allocation within each of the 30 active ST-BUS time slot of CSTo.  
Bit  
Name  
Functional Description  
7 - 4  
A(n),  
B(n),  
C(n),  
D(n)  
Transmit Signalling Bits for Channel n. These bits are transmitted on the PCM  
30 2048 kbit/sec. Link in bit positions one to four of time slot 16 in frame n (where  
n = 1 to 15), and are the A, B, C, D signalling bits associated with channel n.  
3 - 0  
A(n),  
B(n),  
C(n),  
D(n)  
Transmit Signalling Bits for Channel n. These bits are transmitted on the PCM  
30 2048 kbit/sec. Link in bit positions one to four of time slot 16 in frame n (where  
n = 1 to 15), and are the A, B, C, D signalling bits associated with channel n.  
Table 138 - Receive CAS Channels (CSTo) (E1)  
97  
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