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MT9074AL 参数 Datasheet PDF下载

MT9074AL图片预览
型号: MT9074AL
PDF下载: 下载PDF文件 查看货源
内容描述: T1 / E1 / J1单芯片收发器 [T1/E1/J1 Single Chip Transceiver]
分类和应用: 电信集成电路
文件页数/大小: 122 页 / 371 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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Advance Information  
MT9074  
Bit  
Name  
Functional Description  
Yellow Alarm  
Bit  
Name  
Functional Description  
6
D4Y48  
D4  
-
48  
7
TFSYNC Terminal Frame Synchroniza-  
tion. Indicates the Terminal  
Frame Synchronization status (1  
- loss; 0 - acquired). For ESF  
links terminal frame synchroni-  
zation and multiframe synchro-  
nization are synonymous.  
millisecond sample. This bit is  
set if bit position 2 of virtually  
every DS0 channel is a zero for a  
period of 48 milliseconds. The  
alarm is tolerant of errors by  
permitting up to 16 ones in the  
integration period. This bit is  
updated every 48 milliseconds.  
6
5
MFSYN Multiframe Synchronization.  
C
Indicates the Multiframe Syn-  
chronization status (1 - loss; 0 -  
acquired). For ESF links multi-  
frame synchronization and ter-  
minal frame synchronization are  
synonymous.  
5
4
SECYEL Secondary D4 Yellow Alarm.  
This bit is set if 2 consecutive ’1’s  
are received in the Sbit position of  
the 12th frame of the D4  
superframe.  
ESFYEL ESF Yellow Alarm. This bit sets if  
SE  
Severely Errored Frame. This  
bit toggles when 2 of the last 6  
received framing bits are in  
the  
ESF  
yellow  
alarm  
0000000011111111 is received in  
seven or more codewords out of  
ten.  
error.  
The  
framing  
bits  
monitored are the ESF framing  
bits for ESF links, the Ft bits for  
SLC-96 links and a combination  
of Ft and Fs bits for D4 links  
(See Framing Mode Selection  
Word - page 1 address 10H).  
3
2
BLUE  
PDV  
Blue Alarm. This bit is set if less  
than 6 zeros are received in a 3  
millisecond window.  
Pulse Density Violation. This bit  
toggles if RxB8ZS is set high, it  
will toggle upon detection of 8  
consecutive zeros. If RxB8ZS is  
set low, it will toggle upon  
detection of 16 consecutive  
zeros on the line data, or if there  
are less than N ones in a window  
of 8(N+1) bits - where N=1 to 23.  
4
LOS  
Digital Los Of Signal. This bit  
goes high after the detection of  
192 consecutive zeros. It returns  
low when the incoming pulse  
density exceeds 12.5% over a  
250 ms period  
3 - 0  
- - -  
Unused.  
1
0
LLED  
LLDD  
Line Loopback Enable Detect.  
This bit will be set when a framed  
or unframed repeating pattern of  
00001 has been detected during a  
48 millisecond interval. Up to  
fifteen errors are permitted per  
integration period.  
Table 45 - Synchronization Status Word  
(Page 3, Address 10H) (T1)  
Bit  
Name  
Functional Description  
7
D4YALM D4 Yellow Alarm. This bit is set if  
bit position 2 of virtually every  
DS0 channel is a zero for a period  
of 600 milliseconds. The alarm is  
tolerant of errors by permitting up  
to 16 ones in a 48 millisecond  
integration period. The alarm  
clears in 200 milliseconds after  
being removed from the line.  
Line Loopback Disable Detect.  
This bit will be set when a framed  
or unframed repeating pattern of  
001 has been detected during a  
48 millisecond interval. Up to  
fifteen errors are permitted per  
integration period.  
Table 46 - Alarm Status Word  
(Page 3, Address 11H) (T1)  
Table 46 - Alarm Status Word  
(Page 3, Address 11H) (T1)  
55  
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