MT90220
Reset
Value
(Hex)
Address
(Hex)
Access
Type
Table #
Description
RX ICP Cell Offset Register
119
11A
11B
11C
11D
11E
1C0
1C1
1C6
1C7
1C3
292
283
291
290
28F
280
281
29D
284
285
286
D
D
D
D
D
D
D
D
D
D
S
D
S
S
S
S
S
D
D
D
D
D
D
00
00
00
00
20
00
00
00
00
00
00
08
00
00
00
00
80
00
00
00
04
00
04
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
RX Link Frame Sequence Number Registers
RX Link SCCI Sequence Number Registers
RX Link OIF Counter Value Register
RX Link ID Number Registers
RX State Register
RX ICP Cell Type RAM Register 1
RX ICP Cell Type RAM Register 2
RX ICP Cell Buffer Increment Read Pointer Register
RX ICP Cell Level FIFO Status Register
Test Mode Enable Register
SRAM Control Register
RX External SRAM Read/Write Data
RX External SRAM Read/Write Address 0
RX External SRAM Read/Write Address 1
RX External SRAM Read/Write Address 2
RX External SRAM Control Register
Increment/Decrement Delay Control Register
RX Delay Select Register
RX Delay MSB Register
RX Delay LSB Register
RX Delay Link Number Register
288, 28A,
28C, 28E
RX Guardband/Delta Delay LSB Register, 1 per IMA
Group
287, 289,
28B, 28D
D
D
D
00
00
00
73
74
75
RX Guardband/Delta Delay MSB Register, 1per IMA
Group.
296, 298,
29A, 29C
RX Maximum Operational Delay LSB Register, 1 per IMA
Group.
295, 297,
299, 29B
RX Maximum Operational Delay MSB Register
180 - 187
282
D
D
D
D
D
D
D
D
D
D
D
00
00
00
00
05
00
00
00
00
00
00
76
77
78
79
80
81
82
83
84
85
86
RX Recombiner Registers
RX Recombiner Delay Control Register
Enable Recombination Status
RX Reference Link Control Registers
RX IDCR Integration Register
TX PCM Link Control Register #2
TX PCM Link Control Register #1
RX PCM Link Control Register
PLL Reference Control register
Clock Activity Register
29F
188 - 18B
18C - 18F
080 - 087
088 - 08F
090 - 097
098
099
09A
RX Sync. Status Register
Table 11 - Register Summary
39
MITEL [ MITEL NETWORKS CORPORATION ]
