MT8920B CMOS
AC Electrical Characteristics† - Mode 2 Parallel Bus Timing - (see Figures 15 and 16)
(V =5.0V ±5%,T =-40 to 85°C)
CC
A
‡
Characteristics
Sym
Min
Typ
Max Units
Test Conditions
Load A, C =130pF, R =740Ω
1
2
3
4
5
6
7
8
9
OE Low to Valid Data
Address Access Time
CS Low to Valid Data
Output Disable
t
60
120
60
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
L
L
EVD
Load A, C =130pF, R = 740Ω
t
L
L
AA
Load A, C =130pF, R =740Ω
t
L
L
CSD
Load A, C =130pF, R =740Ω
t
50
L
L
OHZ
Address Setup Time
Data Setup Time
t
20
30
5
ASF
DST
DHT
t
Data Hold Time
t
Address Hold Time
Write Pulse Width
t
50
50
AH
t
WP
10 OE, R/W High to C4i High
11 OE, R/W Low to C4i Low
12 C4i High to Busy Low
t
-10
10
50
50
40
EC4H
t
EC4L
C4BL
C4BH
Load C
Load C
Load C
t
13 C4i Low to Busy High
t
14 OE, R/W High to Busy Low
t
EBL
† Timing is over recommended temperature & power supply voltages.
‡ Typical figures are at 25°C, V =5V, t
=244 ns, t =t =122 ns and are for design aid only: not guaranteed and not subject to production
DD
CLK
CH CL
testing.
A0 - A5
CS
t
AH
t
OE
ASF
t
WP
R/W
t
OHZ
t
EVD
t
t
DHT
DST
t
CSD
t
AA
DATA OUT
DATA IN
D0 - D7
Figure 15 - Mode 2 Timing Diagram (No Contention)
3-20
MITEL [ MITEL NETWORKS CORPORATION ]
