MT8920B CMOS
AC Electrical Characteristics† - Mode 3 Timing (see Fig.17, 18 and 19)
((V =5.0V ±5%,TA=-40 to 85°C)
CC
‡
Characteristics
Sym Min Typ
Max
Units
Test Conditions
Load A, C = 130pF, R = 740Ω
1
2
3
4
5
6
7
8
9
CS to OE, WE, Address Enabled
C4i Low to Address Change
CS to OE, WE, Address Disabled
C4i Low to Output Enable Low
C4i Low to Output Enable High
OE, WE, Pulse Width
t
50
ns
ns
ns
ns
ns
ns
ns
ns
ns
L
L
ZR
Load A, C = 130pF, R = 740Ω
t
110
L
L
ACS
Load A, C = 130pF, R = 740Ω
t
50
L
L
RZ
Load A, C = 130pF, R = 740Ω
t
75
75
L
L
OED
Load A, C = 130pF, R = 740Ω
t
L
L
OEH
Load A, C = 130pF, R = 740Ω
t
2*t
CLK
L
L
ENPW
Load A, C = 130pF, R = 740Ω
C4i Low to Write Enable Low
C4i Low to Write Enable High
Read Data Valid from OE
t
75
75
L
L
WED
Load A, C = 130pF, R = 740Ω
t
L
L
WEH
t
(2*t
)
CLK
RST
-60
10 Read Data Hold Time
11 Write Data Setup Time
12 Write Data Hold Time
13 C4i Transition to STCH, DCS Trans.
14 STCH Pulse Width
t
t
0
ns
ns
ns
ns
ns
ns
RHT
Load A, C = 130pF, R = 740Ω
70
70
100
100
L
L
WST
Load A, C = 130pF, R = 740Ω
t
L
L
WHT
Load A, C = 70pF, R = 1.22KΩ
t
120
L
L
STC
Load A, C = 70pF, R = 1.22KΩ
t
t
1830
1830
L
L
SCPW
Load A, C = 70pF, R = 1.22KΩ
15 DCS Pulse Width
L
L
CSPW
† Timing is over recommended temperature & power supply voltages.
‡ Typical figures are at 25°C, V =5V,t
=244ns, t =t =122ns and are for design aid only: not guaranteed and not subject to production
DD
CLK
CH CL
testing.
CHANNEL N
BIT 7 (BIT 3)
BIT 6 (BIT 2)
BIT 5 (BIT 1)
BIT 4 (BIT 0)
C4i
t
ACS
A4 - A0
N + 1
N - 1
t
t
OEH
OED
t
ENPW
OE
WE
t
t
WED
WEH
t
ENPW
t
RST
t
t
WST
WHT
t
RHT
D7 - D0
DATA IN
DATA OUT
t
RZ
t
ZR
CS
Figure 17 - Mode 3 Timing Diagram
3-22
MITEL [ MITEL NETWORKS CORPORATION ]
