DATA SHEET
VSP 94x2A
2
Table 3–8: I C bus command description, continued
Bit
Subaddress 13h
D5-D0 UVDEL
Name
Description
UV Delay Adjustment
Granularity: 50 ns
‘000000’: no delay
‘111111’: 3.15 µs
[FP-RGB]
Subaddress 14h
D5-D0 AGCADJR
Conversion Range Adjustment Red
‘000000’: 0.5 V input signal
[FP-RGB]
‘111111’: 1.5 V input signal
Subaddress 15h
D5-D0 AGCADJG
Conversion Range Adjustment Green
‘000000’: 0.5 V input signal
[FP-RGB]
‘111111’: 1.5 V input signal
Subaddress 16h
D7
ITUPRTSEL
[FP-RGB]
ITU port selection
0: first input (656io)
1: second input (i656i)
D6
CLKF2PAD
[FP-RGB]
Frontend clock is given to pin 74
‘0’ pin 74 is used as h-input for ITU656
‘1’: CLKF20 (20.25 MHz) is given to pin 74
D5-D0
AGCADJB
[FP-RGB]
Conversion Range Adjustment Blue
‘000000’: 0.5 V input signal
‘111111’: 1.5 V input signal
Subaddress 17h
D7-D6
NAPIPPHI
[FP-RGB]
CbYCrY-phase shift
‘0’: no phase shift
D5-D0
AGCADJF
[FP-RGB]
Conversion Range Adjustment Fast Blank
‘000000’: 0.5 V input signal
‘111111’: 1.5 V input signal
Micronas
Aug. 16, 2004; 6251-552-1DS
57
MICRONAS [ MICRONAS ]
