VSP 94x2A
DATA SHEET
2
Table 3–8: I C bus command description, continued
Bit
Name
Description
Subaddress 09h
D6
WRCTRLDIS
[FP-MC]
Memory Write Control Circuit Disable
‘0’: enabled
‘1’: disabled
D5-D4
HAAPRESC
[FP-MC]
Horizontal Anti Alias Filter
‘00’: filter bypassed
‘01’: force characteristic weak
‘10’: force characteristic strong
‘11’: automatic characteristic (weak or strong)
Note: For normal CVBS/RGB full-screen, filter should be set to weak or auto-
matic characteristic. For ITU656 full-screen input, filter should be bypassed.
Strong characteristic is for split-screen and PiP only.
D3-D0
MLL
Minimum Line Length
[FP-MC]
effective number of clock periods: 600 + MLL*128
1110: corresponds to 2392 clock periods
Subaddress 0Ah
D7-D0 BRTADJ
Brightness Adjustment of RGB/YUV input
‘10000000’: −128 LSB (darkest picture)
‘00000000’: 0
[FP-RGB]
‘01111111’: +127 LSB (brightest picture)
Subaddress 0Bh
D7
DECTWO
Decimation by 2
[FP-RGB]
decimation of RGB/YUV signal before soft-mix
‘0’: no decimation
‘1’: decimation by 2
D6
CHRSF
[FP-RGB]
Additional Chroma subsampling filter
‘0’: disabled
‘1’: enabled
D5-D0
CONADJ
[FP-RGB]
Contrast Adjustment of RGB/YUV input
‘000000’: 0
‘000001’: 1/32
‘100000’: 1
‘111111’: 63/32
Subaddress 0Ch
D7
ADCSEL
[FP-RGB]
Select ADC for sync signal conversion
‘0’: use ADC_G
‘1’: use ADC_FBL
D6
AABYP
[FP-RGB]
Bypass RGB/YUV Antialiasfilter
‘0’: use filter
‘1’: bypass
D5-D0
FBLOFFST
[FP-RGB]
Fast Blank Offset Correction
‘000000’: 0 LSB offset
‘111111’: 63 LSB offset
54
Aug. 16, 2004; 6251-552-1DS
Micronas
MICRONAS [ MICRONAS ]
