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SDA9410-B13 参数 Datasheet PDF下载

SDA9410-B13图片预览
型号: SDA9410-B13
PDF下载: 下载PDF文件 查看货源
内容描述: 显示处理器,并采用扫描率转换器的嵌入式DRAM技术单位 [Display Processor and Scan Rate Converter using Embedded DRAM Technology Units]
分类和应用: 转换器动态存储器
文件页数/大小: 179 页 / 3137 K
品牌: MICRONAS [ MICRONAS ]
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SDA9410  
5.6.2  
Preliminary Data Sheet  
Application modes and memory concept  
Configuration controlling  
The following Table 42 and Table 43 summarize all possible combinations of memory  
data configurations for the master and slave channel and the corresponding  
applications. The main configurations are no. 1 for motion compensated up conversion  
and PIP insertion, no. 5 for joint line free Split Screen display and no. 9 for high quality  
Multi Picture including one live channel.  
Table 44 shows the possible picture sizes. The data formats can be always 4:2:0 or  
4:1:1. In SSC and MUP mode the picture sizes are influenced by the I²C Bus parameters  
MEMWRM and MEMWRS.  
Config.  
MEMOP  
ORGMEMM  
ORGMEMS  
Master Channel  
Fields  
Slave Channel  
Fields  
Y
2
2
1
C
2
2
1
Y
C
1
2
3
00  
00  
00  
1
1
0
1
0
1
3
3
not available  
3
2
3
2
4
5
00  
01  
01  
01  
01  
10  
10  
10  
10  
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
0
1
0
1
2
2
1
1
2
2
1
1
1
2
2
1
1
2
2
1
1
1
2
1
2
1
2
1
2
1
1
2
1
2
1
2
1
2
1
6
7
8
9
10  
11  
12  
Table 42  
Programmable data configurations  
57  
Micronas  
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