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SDA9410-B13 参数 Datasheet PDF下载

SDA9410-B13图片预览
型号: SDA9410-B13
PDF下载: 下载PDF文件 查看货源
内容描述: 显示处理器,并采用扫描率转换器的嵌入式DRAM技术单位 [Display Processor and Scan Rate Converter using Embedded DRAM Technology Units]
分类和应用: 转换器动态存储器
文件页数/大小: 179 页 / 3137 K
品牌: MICRONAS [ MICRONAS ]
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SDA9410  
Preliminary Data Sheet  
Application modes and memory concept  
This is the typical configuration needed for joint line free Split Screen/ Double Window’  
or PAPdisplay in 4:1:1 or 4:2:0 format using AABB conversion. The same configuration  
can be used for Multi Picture mode displaying a joint line free live picture and multiple  
high resolution still pictures.  
maximum picture size (master and slave) : 512 (768) pixel X 256 (170) lines  
In MUP-Mode it is possible to write only A fields into the memory. Therefore the I²C Bus  
parameters  
WRFLDM and WRFLDS can be used.  
WRFLDM /  
WRFLDS  
Write field  
(MUP-Mode, MEMOP=10)  
1
0
only A fields are written  
all fields are written corresponding to the actual mode  
Table 48  
Definition of WRFLDM/WRFLDS  
I²C Bus  
Sub address  
Description  
parameter  
[Default]  
WRFLDM  
[0]  
58h  
57h  
Write field master channel (MUP-Mode)  
Write field slave channel (MUP-Mode)  
WRFLDS  
[0]  
Table 49  
5.6.5  
Input write I²C Bus parameter  
Configuration switch  
This chapter deals with the switching between the different operation modes without  
causing visible picture artifacts. The typical application concerns the transition from  
SRC-PIP mode to SSC double window mode (see figure 26 on page 63 and figure 27  
on page 64) and furthermore to an exchange of master and slave channel (see figure  
28 on page 65).  
61  
Micronas  
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