SDA9410
Preliminary Data Sheet
Application modes and memory concept
I²C Bus
Sub address
Description
parameter
[Default]
CHRFORM
[0)
12h
34h
58h
57h
53h
58h
57h
58h
57h
Chrominance data format master channel
Chrominance data format slave channel
Data configuration of the memory master channel
Data configuration of the memory slave channel
Memory operation mode
CHRFORS
[0]
ORGMEMM
[1]
ORGMEMS
[1]
MEMOP
[00]
VERRESM
[0]
Vertical resolution master channel
VERRESS
[0]
Vertical resolution slave channel
MEMWRM
[0]
Memory write mode master channel
Memory write mode slave channel
MEMWRS
[0]
Table 47
5.6.3
Input write I²C Bus parameter
SRC mode configuration
Conditions:MEMOP=00, ORGMEMM=1, ORGMEMS=1
The described data configuration is typical for normal SRC mode with motion
compensated 100 Hz ABAB conversion and joint line free frame based PIP insertion.
maximum picture size (master Channel) : 768 pixel X 288 lines
maximum picture size (slave channel) : 256 pixel X 104 lines
5.6.4
SSC and MUP mode configuration
Conditions: MEMOP=01 or 10, ORGMEMM=1, ORGMEMS=1
60
Micronas