SDA9410
Preliminary Data Sheet
Input sync controller (ISCM/ISCS)
CLKM
H1
H2
(VINDELM * 128 + 1) *
Tclkm
VINM
Vd
Field 1(A)
x
Ffd
VINM
(VINDELM * 128 + 1) *
Tclkm
Vd
x
Ffd
Field 2(B)
Figure 8
Field detection and VINM delay
I²C Bus parameter
Sub address
Description
[Default value]
VINDELM
[0]
11h
33h
0Bh
Delay of the incoming V-Sync VINM (must be adjusted
depending on the delay of the HINM signal)
VINDELS
[0]
Delay of the incoming V-Sync VINS (must be adjusted
depending on the delay of the HINS signal)
FIEINVM
Inversion of the internal field polarity master
1 : Field A=1
[0]: Field A=0
FIEINVS
1 : Field A=1
[0]: Field A=0
2Dh
0Bh
2Dh
Inversion of the internal field polarity slave
VCRMODEM
[1]: on
0 : off
In case of non standard interlaced signals (VCR, Play-
Stations) a filtering of the internal field signal has to be done
(should also be used for normal TV signals)
VCRMODES
[1]: on
0 : off
In case of non standard interlaced signals (VCR, Play-
Stations) a filtering of the internal field signal has to be done
(should also be used for normal TV signals)
Table 4
Input write I²C Bus parameter
In case of non-standard signals the field order is indeterminate (e.g. AAA... , BBB... ,
AAABAAAB..., etc.). Therefore a special filtering algorithm is implemented, which can be
switched on by the I²C Bus parameter VCRMODEM/VCRMODES. It is recommended to
set the I²C Bus parameter VCRMODEM=1. In other case (VCRMODEM=0) an additional
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Micronas