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MAS3509F 参数 Datasheet PDF下载

MAS3509F图片预览
型号: MAS3509F
PDF下载: 下载PDF文件 查看货源
内容描述: MAS 35x9F MPEG 2/3层, AAC音频解码器, G.729附录编解码器 [MAS 35x9F MPEG Layer 2/3, AAC Audio Decoder, G.729 Annex A Codec]
分类和应用: 解码器编解码器
文件页数/大小: 92 页 / 1187 K
品牌: MICRONAS [ MICRONAS ]
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DATA SHEET  
MAS 35x9F  
2.11.2.1.Important Advice for Turn-on and Operat-  
ing Voltage  
Before the 2.2 V are programmed at the DCDC con-  
verter, DSP+Codec must be enabled.  
Operating and Turn-Off is possible down to 2.2 V.  
The sequence should be similar to the following:  
1. Start DCDC  
2. Set DCDC to 2.5 V  
Turn on DSP+Codec  
Write App-Select memory cell  
Read App-Running Mem cell  
If okay: Set DCDC to 2.2 V  
Set other mem cells  
Set other codec registers  
.....  
3. Demute...send data  
4. Mute...stop data.....loop "3)" "4)"...  
5. Turn off DSP+Codec  
goto "2)"  
etc.....  
The signal at pin PUP will return to low only when both  
2
PUPn flags (I C subaddress 76 ) have returned to  
hex  
zero. Care must be taken when changing both DC/DC  
output voltages to higher values. In this case, both out-  
put voltages are momentarily insufficient to keep the  
PUPn flags up; the resulting dip in the signal at the  
PUP pin may, in turn, reset the microcontroller. To  
avoid this condition, only one DC/DC output voltage  
should be changed at a time. Before modifying the  
second voltage, the microcontroller must wait for the  
PUPn flag of the first voltage to be set again.  
If only DC/DC converter 1 is used, the reference volt-  
age of the second, unused converter should be set to  
a lower value than that of converter 1, and its pin  
VSENS2 should be connected to VDD.  
The operating mode pulse width modulation, or pulse  
2
frequency modulation, are controlled at I C subad-  
2
dress 76 , the operating frequency at I C subad-  
hex  
dress 77  
.
hex  
Micronas  
June 30, 2004; 6251-505-1DS  
19