DATA SHEET
MAS 35x9F
2.7. Battery Voltage Supervision
2.8.4. Multiline Serial Audio Input (SDI, SDIB)
Independent of the DC/DC converters, a battery volt-
age supervision circuit (at pin VBAT) is provided. It can
be programmed to supervise one or two battery cells.
The voltage is measured by subsequently setting a
series of voltage thresholds and checking the respec-
There are two multiline serial audio input interfaces
(SDI, SDIB) each consisting of the three pins SI(B)C,
SI(B)I, and SI(B)D. The standard firmware only sup-
ports SDIB for bit-stream signals, while PCM-inputs
should be routed to SDI.
tive comparison result in register 77
.
hex
The interfaces can be configured as continuous bit-
stream or word-oriented inputs. For the MPEG bit
streams, the word strobe pin SIBI must always be con-
2.8. Interfaces
nected to V ; bits must be sent MSB first as created
by the encoder.
SS
2
The MAS 35x9F uses an I C control interface, a serial
input interface for MPEG bit streams, and digital audio
2
output interfaces for the decoded audio data (I S and
If the download software (refer to Download Software
Supplement I2SPDIF (6251-505-1PDS)) is used, the
S/PDIF). S/PDIF input is available after Software
download. A parallel I/O interface (PIO) may be used
for fast data exchange.
2
interface acts as an I S-type with SI(B)I as a word-
strobe for PCM data.
For the Demand Mode (see Section 2.5.), the signal
clock coming from the data source must be higher than
the nominal data transmission rate (e.g. 128 kbit/s).
Pin EOD is used to interrupt the data flow whenever
the input buffer of the MAS 35x9F is filled.
2
2.8.1. I C Control Interface
For controlling and program download purposes, a
standard I C slave interface is implemented. A
2
detailed description of all functions can be found in
Section 3.
For controlling details, please refer to Table 3–8 on
page 32.
2.8.2. S/PDIF Input Interface
2.8.5. Multiline Serial Output (SDO)
The S/PDIF interface receives a one-wire serial bus
signal. In addition to the signal input pin SPDI1/SPDI2,
a reference pin SPDIR is provided to support balanced
signal sources or twisted pair transmission lines.
The serial audio output interface of the MAS 35x9F is
a standard I S-like interface consisting of the data
2
lines SOD, the word strobe SOI and the clock signal
SOC. It is possible to choose between two standard
interface configurations (16-bit data words with word
strobe time offset or 32-bit data words with inverted
SOI signal).
The synchronization time on the input signal is
< 50 ms.
S/PDIF input is not supported for MPEG 1/2 Layer 2/3
and MPEG 2 AAC.
If the serial output generates 32 bits per audio sample,
only the first 20 bits will carry valid audio data. The
12 trailing bits are set to zero by default.
Micronas has developed a download software for flexi-
ble usage of the S/PDIF I/O and SDI/SDO interfaces. It
is described in Download Software Supplement
I2SPDIF (6251-505-1PDS).
2.8.6. Parallel Input/Output Interface (PIO)
The parallel interface of the MAS 35x9F consists of the
8 data lines PI12...PI19 (MSB) and the control lines
PCS, PR, PRTR, PRTW, and EOD. It can be used for
data exchange with an external memory, for fast pro-
gram download and for other special purposes as
defined by the DSP software.
2.8.3. S/PDIF Output
The S/PDIF output of the baseband audio signals is
implemented at pin SPDO since version B4.
The channel status bits can be set as described in
Table 3–8.
For MPEG data input, the PIO interface is activated by
setting bits[9] and [8] in D0:346 to 01. For the hand-
shake protocol, please refer to Section 4.6.2.8. on
page 80.
Micronas
June 30, 2004; 6251-505-1DS
15
MICRONAS [ MICRONAS ]
