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MAS3509F 参数 Datasheet PDF下载

MAS3509F图片预览
型号: MAS3509F
PDF下载: 下载PDF文件 查看货源
内容描述: MAS 35x9F MPEG 2/3层, AAC音频解码器, G.729附录编解码器 [MAS 35x9F MPEG Layer 2/3, AAC Audio Decoder, G.729 Annex A Codec]
分类和应用: 解码器编解码器
文件页数/大小: 92 页 / 1187 K
品牌: MICRONAS [ MICRONAS ]
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MAS 35x9F  
DATA SHEET  
3. Controlling  
nibble.  
– Data values in nibbles are always shown in hexa-  
decimal notation.  
2
3.1. I C Interface  
Controlling between the MAS 35x9F and the external  
controller is done via an I C slave interface.  
– A hexadecimal 20-bit number d is written, e.g. as  
2
d = 17C63 , its five nibbles are  
hex  
d0 = 3 , d1 = 6 , d2 = C , d3 = 7 , and  
hex  
hex  
hex  
hex  
hex  
3.1.1. Device Address  
d4 = 1  
.
Variables used in the following descriptions:  
The device addresses are 3C/3E  
(device write  
hex  
I²C address:  
“DW”) and 3D/3F  
(device read, “DR”) as shown in  
hex  
2
DW3C/3E I C device write  
hex  
Table 3–1. The device address pair 3C/3D  
the DVS pin is connected to VSS, the device address  
applies if  
hex  
2
DR3D/3F I C device read  
hex  
DSP core:  
pair 3E/3F  
I2CVDD.  
applies if the DVS pin is connected to  
hex  
data_write68 DSP data write  
hex  
data_read69 DSP data read  
hex  
Codec:  
2
Table 3–1: I C device address  
codec_write6C codec write  
hex  
codec_read6D codec read  
hex  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
W/R  
Bus signals  
S
P
A
N
Start  
Stop  
0
0
1
1
1
1
DVS  
0/1  
ACK = Acknowledge  
NAK = Not acknowledge  
2
I C clock synchronization is used to slow down the  
interface if required.  
2
W Wait = I C clock line is held low  
while the MAS 35x9F is processing  
the current I C command  
2
2
3.1.2. I C Registers and Subaddresses  
Symbols in the telegram examples  
The interface uses one level of subaddresses. The  
MAS 35x9F interface has 7 subaddresses allocated  
for the corresponding I C registers. The registers can  
be divided into three categories as shown in Table 3–  
2.  
<
>
Start Condition  
Stop  
2
dd  
xx  
data bytes  
ignore  
All telegram numbers are hexadecimal, data origi-  
nating from the MAS 35x9F are represented as gray  
letters.  
Example:  
The address 6A  
and task select. The other addresses are used for data  
transfer from/to the MAS 35x9F.  
is used for basic control, i.e. reset  
hex  
<DW 68 dd dd >  
write data to DSP  
<DW 69 <DR dd dd > read data from DSP  
2
The I C registers of the MAS 35x9F are 16 bits wide,  
2
the MSB is denoted as bit[15]. Transmissions via I C  
bus have to take place in 16-bit words (two byte trans-  
fers, MSB sent first); thus, for each register access,  
2
Fig. 3–1 shows I C bus protocols for write and read  
operations of the interface; the read operations require  
an extra start condition and repetition of the chip  
address with the device read command (DR). Fields  
with signals/data originating from the MAS 35x9F are  
marked by a gray background.  
2
two 8-bit data words must be sent/received via I C  
bus.  
3.1.3. Naming Convention  
The description of the various controller commands  
uses the following formalism:  
Note: In some cases the data reading process must  
be concluded by a NAK condition.  
Abbreviations used in the following descriptions:  
a
d
n
o
r
address  
data value  
count value  
offset value  
register number  
don’t care  
3.2. Direct Configuration Registers  
x
The task selection of the DSP and the DC/DC convert-  
ers are controlled in the direct configuration registers  
CONTROL, DCCF, and DCFR.  
– Memory addresses, like D1:89f, are always in hexa-  
decimal notation.  
– A data value is split into 4-bit nibbles which are  
numbered beginning with 0 for the least significant  
22  
June 30, 2004; 6251-505-1DS  
Micronas  
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