128Mb, 256Mb, 512Mb, 1Gb StrataFlash Memory
Common Flash Interface
Table 49: Primary Micron-Specific Extended Query (Continued)
Hex Offset
P = 10Ah
ASCII Value
(DQ[7:0])
Length Description
Address Hex Code
(P+C)h
1
VCC logic supply highest performance program/
116:
- -18
1.8V
erase voltage
bits 0–3 BCD 100mV
Bits 4–7 BCD value in volts
(P+D)h
1
VPP optimum program/erase voltage
Bits 0–3 BCD 100mV
117:
- -90
9.0V
Bits 4–7 hex value in volts
Table 50: One Time Programmable (OTP) Space Information
Hex Offset
Hex
Code
ASCII Value
(DQ[7:0])
P = 10Ah
Length
Description
Address
(P+E)h
1
Number of OTP block fields in JEDEC ID space.
00h indicates that 256 OTP fields are available
118:
- -02
2
OTP Field 1:
119:
11A:
1B:
- -80
- -00
- -03
- -03
80h
00h
This field describes user-available OTP bytes.
Some are preprogrammed with device-unique se-
rial numbers. Others are user-programmable.
Bits 0–15 point to the OTP lock byte (the first
byte).
8 byte
8 byte
11C:
(P+F)h
(P+10)h
(P+11)h
(P+12)h
The following bytes are factory preprogrammed
and user-programmable:
Bits 0–7 = lock/bytes JEDEC plane physical low ad-
dress.
4
Bits 8–15 = lock/bytes JEDEC plane physical high
address.
Bits 16–23 = n where 2n equals factory-preprog-
rammed bytes.
Bits 24–31 = n where 2n equals user-programma-
ble bytes.
(P+13)h
(P+14)h
(P+15)h
(P+16)h
4
3
Protection Field 2:
11D:
11E:
11F:
120:
- -89
- -00
- -00
- -00
89h
00h
00h
00h
Bits 0–31 point to the protection register physical
lock word address in the JEDEC plane.
The bytes that follow are factory or user-progam-
mable.
(P+17)h
(P+18)h
(P+19)h
Bits 32–39 = n where n equals factory-program-
med groups (low byte).
Bits 40–47 = n where n equals factory program-
med groups (high byte).
121:
122:
123:
- -00
- -00
- -00
0
0
0
Bits 48–55 = n where 2n equals factory-program-
med bytes/groups.
PDF: 09005aef8448483a
128_256_512_65nm_g18.pdf - Rev. F 8/11 EN
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