128Mb, 256Mb, 512Mb, 1Gb StrataFlash Memory
Common Flash Interface
Table 47: Device Geometry (Continued)
Hex
Hex
Code
ASCII Value
(DQ[7:0])
Offset
Length Description
Address
28:
28h
2
Flash device interface code assignment: n such that n +
- -01
- -00
x16
1 specifies the bit field that represents the device
width capabilities as described here:
29:
bit 0: x8
bit 1: x16
bit 2: x32
bit 3: x64
bits 4–7: –
bits 8–15: –
2Ah
2Ch
2
1
n such that maximum number of bytes in write buffer
2Ah
2Bh
2Ch
- -0A
- -00
1024
= 2n
Number of erase block regions (x) within the device:
x = 0 indicates no erase blocking; the device erases in
bulk
(page 0
)
x specifies the number of device regions with one or
more contiguous, same-size erase blocks
Symmetrically blocked partitions have one blocking re-
gion
2Dh
31h
35h
4
4
4
Erase block region 1 information:
bits 0–15 = y, y + 1 = number of identical-size erase
blocks
bits 16–31 = z, region erase block(s) size are z x 256
bytes
2D:
30:
(page 0
(page 0
(page 0
)
)
)
Erase block region 2 information:
bits 0–15 = y, y + 1 = number of identical-size erase
blocks
bits 16–31 = z, region erase block(s) size are z x 256
bytes
31:
34:
Reserved for future erase block region information
35:
38:
1. See the bit field table.
Note:
Table 48: Block Region Map Information
128Mb
Bottom
256Mb
512Mb
1Gb
Address
27:
Top
- -
Bottom
- -19
Top
- -
Bottom
- -1A
- -01
Top
- -
Bottom
- -1B
Top
- -
- -18
- -01
- -00
- -0A
- -00
- -01
28:
- -
- -01
- -
- -
- -01
- -
29:
- -
- -00
- -
- -00
- -
- -00
- -
2A:
- -
- -0A
- -00
- -
- -0A
- -00
- -
- -0A
- -00
- -
2B:
- -
- -
- -
- -
2C:
- -
- -01
- -
- -01
- -
- -01
- -
PDF: 09005aef8448483a
128_256_512_65nm_g18.pdf - Rev. F 8/11 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
84
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