128Mb, 256Mb, 512Mb, 1Gb StrataFlash Memory
Common Flash Interface
Table 52: Partition and Block Erase Region Information
Hex Offset
P = 10Ah
Address
Bottom
12C:
Description
Optional Features and Commands
Bottom
(P+22)h
Top
Length
Top
(P+22)h
Number of device hardware partition regions
within the device:
1
12C:
x = 0: A single hardware partition device (no
fields follow).
x specifies the number of device partition regions
containing one or more contiguous erase block
regions
Table 53: Partition Region 1 Information: Top and Bottom Offset/Address
Hex Offset
P = 10Ah
Address
Description
Bottom
(P+23)h
(P+24)h
Top
Optional Features and Commands
Length
Bottom
12D:
Top
12D:
12E:
(P+23)h
(P+24)h
Data size of this Partition Region information field:
(number of addressable locations, including this
field).
2
12E:
(P+25)h
(P+26)h
(P+25)h
(P+26)h
Number of identical partitions within the partition
region.
2
1
12F:
130:
131:
12F:
130:
131:
(P+27)h
(P+27)h
Number of PROGRAM or ERASE operations allowed
in a partition:
Bits 0–3 = number of simultaneous PROGRAM opera-
tions.
Bits 4–7 = number of simultaneous ERASE operations.
(P+28)h
(P+28)h
Simultaneous PROGRAM or ERASE operations al-
lowed in other partitions while a partition in this re-
gion is in program mode:
Bits 0–3 = number of simultaneous program opera-
tions.
1
1
132:
133:
132:
133:
Bits 4–7 = number of simultaneous ERASE operations.
(P+29)h
(P+29)h
Simultaneous PROGRAM or ERASE operations al-
lowed in other partitions while a partition in this re-
gion is in erase mode:
Bits 0–3 = number of simultaneous PROGRAM opera-
tions.
Bits 4–7 = number of simultaneous ERASE operations.
PDF: 09005aef8448483a
128_256_512_65nm_g18.pdf - Rev. F 8/11 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
89
© 2011 Micron Technology, Inc. All rights reserved.