512Mb, Multiple I/O Serial Flash Memory
READ MEMORY Operations
Figure 18: QUAD OUTPUT FAST READ Command
0
7
8
Cx
C
LSB
A[MIN]
LSB
DOUT
DOUT
DOUT
DOUT
DOUT
DOUT
DOUT
DQ0
Command
High-Z
‘1’
MSB
A[MAX]
DOUT
DQ[2:1]
DQ3
DOUT
MSB
Dummy cycles
1. Cx = 7 + (A[MAX] + 1).
Notes:
2. Shown here is the QUAD OUTPUT FAST READ timing for the extended SPI protocol. The
quad timing shown for the FAST READ command is the equivalent of the QUAD OUT-
PUT FAST READ timing for the quad SPI protocol.
Figure 19: QUAD INPUT/OUTPUT FAST READ Command
0
7
8
Cx
C
LSB
A[MIN]
LSB
DOUT
DOUT
DOUT
DOUT
DOUT
DOUT
DOUT
DQ0
Command
High-Z
‘1’
MSB
DOUT
DQ[2:1]
DQ3
DOUT
A[MAX]
MSB
Dummy cycles
1. Cx = 7 + (A[MAX] + 1)/4.
Notes:
2. Shown here is the QUAD INPUT/OUTPUT FAST READ timing for the extended SPI proto-
col. The quad timing shown for the FAST READ command is the equivalent of the QUAD
INPUT/OUTPUT FAST READ timing for the quad SPI protocol.
PDF: 09005aef84752721
n25q_512mb_1ce_3V_65nm.pdf - Rev. O 05/13 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
49
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