Power-up and power-down
N25Q128 - 1.8 V
Figure 105. Power-up timing, Fast POR selected
Vcc
VCC(max)
WREN issued
Chip selection notallowed
VCC(min)
tVTR
tDTW
Device fully accessible
Polling allowed
Chip
reset
All read, WRCR,
WRECR allowed
Polling
allowed
SPIprotocol
Starting protocol defined by NVCR
VWI
WIP = 1
WEL = 0
WIP = 0
WEL = 0
WIP = 1
WEL = 1
WIP = 0
WEL = 1
time
Figure 106. Power-up timing, Fast POR not selected
Vcc
VCC(max)
Chip selection notallowed
VCC(min)
tVTW = tVTR + tDTW
Chip
reset
Polling allowed
Device fully accessible
SPIprotocol
Starting protocol defined by NVCR
VWI
WIP = 1
WEL = 0
WIP = 0
WEL = 0
time
Table 27. Power-up timing and V threshold
WI
Symbol
Parameter
Min
Max
Unit
(1)
tVTR
VCC(min) to Read when Fast POR is selected
Time delay to write instruction when Fast POR is selected
VCC(min) to device fully accessible
100
500
600
2.5
µs
µs
µs
V
(1)
tDTW
(1)
tVTW
(1)
VWI
Write inhibit voltage
1.5
1. These parameters are characterized only.
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MICRON [ MICRON TECHNOLOGY ]
