N25Q128 - 1.8 V
Instructions
Figure 81. Quad Command Page Program instruction sequence QIO-SPI, 32h
S
C
515
517
519
Mode 3
Mode 0
0
1
2
3
4
5
6
7
8
9
10 11 12
14 15
13
514
516
518
24-bit address
Data In
Data In
254 255
1
2
3
4
256
DQ0
DQ1
DQ2
20 16 12
21 17 13
8
9
4
0
4
0
4
0
4
5
6
7
0
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
0
1
2
3
4
5
6
7
0
1
2
3
5
6
7
1
2
3
5
6
1
2
5
6
1
2
1
2
3
5
6
7
22 18 14 10
23 19 15 11
7
3
7
3
DQ3
MSB
MSB
MSB
MSB
MSB MSB
Quad_Command_Page_Program_12h
9.3.7
Program OTP instruction (POTP)
The Program OTP instruction (POTP) is used to program at most 64 bytes to the OTP
memory area (by changing bits from 1 to 0, only). Before it can be accepted, a Write Enable
(WREN) instruction must previously have been executed.
Apart form the parallelizing of the instruction code, address and input data on the four pins
DQ0, DQ1, DQ2 and DQ3, the instruction functionality (as well as the locking OTP method)
is exactly the same as the Program OTP (POTP) instruction of the Extended SPI protocol,
please refer to Section 9.1.16: Program OTP instruction (POTP) for further details.
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