N25Q128 - 1.8 V
Instructions
Figure 50. Dual Command Page Program instruction sequence DSP, A2h
S
C
1039
1038
1037
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
1036
Instruction
24-Bit Address
DataByte256
DataByte1
DataByte2
6
7
4
5
2
3
0
1
6
7
4
0
6
4
0
22 20 18 16
23 21 19 17
6
4
0
2
14 12 10
8
2
2
DQ0
DQ1
5
1
7
5
1
7
5
1
3
15 13 11
9
3
3
Dual_Page_Program_A2h
Figure 51. Dual Command Page Program instruction sequence DSP, D2h
S
C
1039
1038
1037
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
1036
Instruction
24-Bit Address
DataByte256
DataByte1
DataByte2
6
7
4
5
2
3
0
1
6
7
4
0
6
4
0
22 20 18 16
23 21 19 17
6
4
0
2
14 12 10
8
2
2
DQ0
DQ1
5
1
3
7
5
1
7
5
1
15 13 11
9
3
3
Dual_Page_Program_D2h
9.2.7
Program OTP instruction (POTP)
The Program OTP instruction (POTP) is used to program at most 64 bytes to the OTP
memory area (by changing bits from 1 to 0, only). Before it can be accepted, a Write Enable
(WREN) instruction must previously have been executed.
Apart form the parallelizing of the instruction code, address and input data on the two pins
DQ0 and DQ1, the instruction functionality (as well as the locking OTP method) is exactly
the same as the Program OTP (POTP) instruction of the Extended SPI protocol, please
refer to Section 9.1.16: Program OTP instruction (POTP) for further details.
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