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N25Q128A11B1241F 参数 Datasheet PDF下载

N25Q128A11B1241F图片预览
型号: N25Q128A11B1241F
PDF下载: 下载PDF文件 查看货源
内容描述: 128兆位, 1.8 V ,多个I / O , 4 KB的界别分组擦除引导扇区, XIP启用,串行闪存与108 MHz的SPI总线接口 [128-Mbit, 1.8 V, multiple I/O, 4-Kbyte subsector erase on boot sectors, XiP enabled, serial flash memory with 108 MHz SPI bus interface]
分类和应用: 闪存
文件页数/大小: 185 页 / 5874 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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Instructions  
N25Q128 - 1.8 V  
Figure 48. Write Disable instruction sequence DIO-SPI  
S
0
1
2
3
4
C
Instruction  
DQ0  
DQ1  
Dual_Write_Disable  
9.2.6  
Dual Command Page Program (DCPP)  
The Dual Command Page Program (DCPP) instruction allows to program the memory  
content in DIO-SPI protocol, parallelizing the instruction code, the address and the input  
data on two pins (DQ0 and DQ1). Before it can be accepted, a Write Enable (WREN)  
instruction must previously have been executed. The Dual Command Page Program  
(DCPP) instruction can be issued, when the device is set in DIO-SPI mode, by sending to  
the memory indifferently one of the 3 instructions codes: 02h, A2h or D2h, the effect is  
exactly the same. The 3 instruction codes are all accepted to help the application code  
porting from Extended SPI protocol to DIO-SPI protocol.  
Apart for the parallelizing on two pins of the instruction code, the Dual Command Page  
Program instruction functionality is exactly the same as the Dual Input Extended Fast  
Program of the Extended SPI protocol, please refer to Section 9.1.13: Dual Input Extended  
Fast Program for further details.  
Figure 49. Dual Command Page Program instruction sequence DSP, 02h  
S
C
1039  
1038  
1037  
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23  
1036  
Instruction  
24-Bit Address  
DataByte256  
DataByte1  
DataByte2  
6
7
4
5
2
3
0
1
6
7
4
0
6
4
0
22 20 18 16  
23 21 19 17  
6
4
0
2
14 12 10  
8
2
2
DQ0  
DQ1  
5
1
7
5
1
7
5
1
3
15 13 11  
9
3
3
Dual_Page_Program_02h  
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