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N25Q128A11B1241F 参数 Datasheet PDF下载

N25Q128A11B1241F图片预览
型号: N25Q128A11B1241F
PDF下载: 下载PDF文件 查看货源
内容描述: 128兆位, 1.8 V ,多个I / O , 4 KB的界别分组擦除引导扇区, XIP启用,串行闪存与108 MHz的SPI总线接口 [128-Mbit, 1.8 V, multiple I/O, 4-Kbyte subsector erase on boot sectors, XiP enabled, serial flash memory with 108 MHz SPI bus interface]
分类和应用: 闪存
文件页数/大小: 185 页 / 5874 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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N25Q128 - 1.8 V  
Instructions  
Figure 35. Clear Flag Status Register instruction sequence  
S
0
1
2
3
4
5
6
7
8
C
Instruction  
DQ0  
DQ1  
High Impedance  
MSB  
Clear_Flag_SR  
9.1.28  
Read NV Configuration Register  
The Read Non Volatile Configuration Register (RDNVCR) instruction allows the Non Volatile  
Configuration Register to be read.  
Figure 36. Read NV Configuration Register instruction sequence  
S
23  
9 10 11 12 13 14 15 16 17 18 19 20 21 22  
0
1
2
3
4
5
6
7
8
C
Instruction  
DQ0  
NVCR Out  
NVCR Out  
High Impedance  
DQ1  
7
6
5
4
3
2
1
0
15 14 13 12 11 10  
MS Byte  
9
8
LS Byte  
Read_NVCR  
9.1.29  
Write NV Configuration Register  
The Write Non Volatile Configuration register (WRNVCR) instruction allows new values to  
be written to the Non Volatile Configuration register. Before it can be accepted, a write  
enable (WREN) instruction must previously have been executed. After the write enable  
(WREN) instruction has been decoded and executed, the device sets the write enable latch  
(WEL).  
The Write Non Volatile Configuration register (WRNVCR) instruction is entered by driving  
Chip Select (S) Low, followed by the instruction code and the data bytes on serial data input  
(DQ0).  
Chip Select (S) must be driven High after the 16th bit of the data bytes has been latched in.  
If not, the Write Non Volatile Configuration register (WRNVCR) instruction is not executed.  
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