N25Q128 - 1.8 V
Instructions
(1)
Table 21. Lock Register out
Bit
Bit name Value
Function
b7-b2
Reserved
The Write Lock and Lock Down bits cannot be changed. Once a ‘1’ is written to the
Lock Down bit it cannot be cleared to ‘0’, except by a power-up.
‘1’
Sector Lock
b1
b0
Down
‘0’
The Write Lock and Lock Down bits can be changed by writing new values to them.
Write, Program and Erase operations in this sector will not be executed. The
memory contents will not be changed.
‘1’
Sector
Write Lock
‘0’
Write, Program and Erase operations in this sector are executed and will modify the
sector contents.
1. Values of (b1, b0) after power-up are defined in Section 7: Protection modes.
9.1.25
Write to Lock Register (WRLR)
The Write to Lock Register (WRLR) instruction allows bits to be changed in the Lock
Registers. Before it can be accepted, a Write Enable (WREN) instruction must previously
have been executed. After the Write Enable (WREN) instruction has been decoded, the
device sets the Write Enable Latch (WEL).
The Write to Lock Register (WRLR) instruction is entered by driving Chip Select (S) Low,
followed by the instruction code, three address bytes (pointing to any address in the
targeted sector and one data byte on Serial Data input (DQ0). The instruction sequence is
shown in Figure 22. Chip Select (S) must be driven High after the eighth bit of the data byte
has been latched in, otherwise the Write to Lock Register (WRLR) instruction is not
executed.
Lock Register bits are volatile, and therefore do not require time to be written. When the
Write to Lock Register (WRLR) instruction has been successfully executed, the Write
Enable Latch (WEL) bit is reset after a delay time less than tSHSL minimum value.
Any Write to Lock Register (WRLR) instruction, while an Erase, Program or Write cycle is in
progress, is rejected without having any effects on the cycle that is in progress.
Figure 33. Write to Lock Register instruction sequence
S
C
0
1
2
3
4
5
6
7
8
9
10
28 29 30 31 32 33 34 35 36 37 38 39
Lock register
in
Instruction
24-bit address
23 22 21
MSB
3
2
1
0
7
6
5
4
3
2
0
1
DQ0
MSB
AI13740
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