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N25Q128A11B1241F 参数 Datasheet PDF下载

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型号: N25Q128A11B1241F
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内容描述: 128兆位, 1.8 V ,多个I / O , 4 KB的界别分组擦除引导扇区, XIP启用,串行闪存与108 MHz的SPI总线接口 [128-Mbit, 1.8 V, multiple I/O, 4-Kbyte subsector erase on boot sectors, XiP enabled, serial flash memory with 108 MHz SPI bus interface]
分类和应用: 闪存
文件页数/大小: 185 页 / 5874 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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List of figures  
N25Q128 - 1.8 V  
Figure 49. Dual Command Page Program instruction sequence DSP, 02h . . . . . . . . . . . . . . . . . . . 118  
Figure 50. Dual Command Page Program instruction sequence DSP, A2h . . . . . . . . . . . . . . . . . . . 119  
Figure 51. Dual Command Page Program instruction sequence DSP, D2h . . . . . . . . . . . . . . . . . . . 119  
Figure 52. Program OTP instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120  
Figure 53. Subsector Erase instruction sequence DIO-SPI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120  
Figure 54. Sector Erase instruction sequence DIO-SPI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121  
Figure 55. Bulk Erase instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122  
Figure 56. Program/Erase Suspend instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . 122  
Figure 57. Program/Erase Resume instruction sequence DIO-SPI. . . . . . . . . . . . . . . . . . . . . . . . . . 123  
Figure 58. Read Status Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124  
Figure 59. Write Status Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124  
Figure 60. Read Lock Register instruction and data-out sequence DIO-SPI. . . . . . . . . . . . . . . . . . . 125  
Figure 61. Write to Lock Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . 126  
Figure 62. Read Flag Status Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . 126  
Figure 63. Clear Flag Status Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . 127  
Figure 64. Read NV Configuration Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . 127  
Figure 65. Write NV Configuration Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . . . . 128  
Figure 66. Read Volatile Configuration Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . 129  
Figure 67. Write Volatile Configuration Register instruction sequence DIO-SPI . . . . . . . . . . . . . . . . 129  
Figure 68. Read Volatile Enhanced Configuration Register instruction sequence DIO-SPI . . . . . . . 130  
Figure 69. Write Volatile Enhanced Configuration Register instruction sequence DIO-SPI . . . . . . . 131  
Figure 70. Deep Power-down instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131  
Figure 71. Release from Deep Power-down instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . 132  
Figure 72. Multiple I/O Read Identification instruction and data-out sequence QIO-SPI . . . . . . . . . . 135  
Figure 73. Quad Command Fast Read instruction and data-out sequence QSP, 0Bh . . . . . . . . . . . 136  
Figure 74. Quad Command Fast Read instruction and data-out sequence QSP, 6Bh . . . . . . . . . . . 136  
Figure 75. Quad Command Fast Read instruction and data-out sequence QSP, EBh . . . . . . . . . . . 137  
Figure 76. Read OTP instruction and data-out sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . 138  
Figure 77. Write Enable instruction sequence QIO-SPI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138  
Figure 78. Write Disable instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139  
Figure 79. Quad Command Page Program instruction sequence QIO-SPI, 02h. . . . . . . . . . . . . . . . 140  
Figure 80. Quad Command Page Program instruction sequence QIO-SPI, 12h. . . . . . . . . . . . . . . . 140  
Figure 81. Quad Command Page Program instruction sequence QIO-SPI, 32h. . . . . . . . . . . . . . . . 141  
Figure 82. Program OTP instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142  
Figure 83. Subsector Erase instruction sequence QIO-SPI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143  
Figure 84. Sector Erase instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143  
Figure 85. Bulk Erase instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144  
Figure 86. Program/Erase Suspend instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . 145  
Figure 87. Program/Erase Resume instruction sequence QIO-SPI. . . . . . . . . . . . . . . . . . . . . . . . . . 146  
Figure 88. Read Status Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147  
Figure 89. Write Status Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148  
Figure 90. Read Lock Register instruction and data-out sequence QIO-SPI . . . . . . . . . . . . . . . . . . 149  
Figure 91. Write to Lock Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . 150  
Figure 92. Read Flag Status Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . 151  
Figure 93. Clear Flag Status Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . . . . . . 152  
Figure 94. Read NV Configuration Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . 153  
Figure 95. Write NV Configuration Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . . . . 154  
Figure 96. Read Volatile Configuration Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . 155  
Figure 97. Write Volatile Configuration Register instruction sequence QIO-SPI . . . . . . . . . . . . . . . . 156  
Figure 98. Read Volatile Enhanced Configuration Register instruction sequence QIO-SPI . . . . . . . 157  
Figure 99. Write Volatile Enhanced Configuration Register instruction sequence QIO-SPI . . . . . . . 158  
Figure 100. Deep Power-down instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159  
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