‡
Pre lim in a ry
MT9V012 - 1/6-In ch VGA CMOS Dig it a l Im a g e Se n so r
Fe a t u re De scrip t io n
Fe a t u re De scrip t io n
Win d o w Co n t ro l
Win d o w St a rt
The row and column start address of the displayed image can be set by Reg0x01 (row
start) and Reg0x02 (column start).
Win d o w Size
The size of the displayed image can be set by Reg0x03 (row width) and Reg0x04 (column
width). The default image size is 640 columns and 480 rows (VGA).
Pixe l Bo rd e r
When Reg0x20[9:8] are both set, a four-pixel border will be added around the specified
image. This border can be used as extra pixels for image processing algorithms. The bor-
der is independent of the readout mode, which means that even in skip modes, a four-
pixel border will be output in the image. When enabled, the row and column widths will
be eight larger than the values programmed in Reg0x03 and Reg0x04. If the border is
enabled but not shown in the image (Rex0x20[9:8] = 01), the horizontal blanking and
vertical blanking values will be eight larger than the values programmed into the blank-
ing registers.
Co n t e xt Sw it ch in g
Reg0xC8 is designed to enable easy switching between sensor modes. Some key registers
and bits in the sensor have two physical register locations, called contexts. Bits 0, 1, and
3 of Reg0xC8 control which context register context is currently in use. A “1” in a bit will
select context B, while a “0” will select context A for this parameter. The select bits can
be used in any combination, but by default are set up to make switching between pre-
view mode and full-resolution mode easy:
Co n t e xt B (De fa u lt Co n t e xt )
Reg0xC8 = 0x000B
(Context B)
Reg0x05
Reg0x06
Reg0x20
= 0x00F4
= 0x001D
= 0x0400
(Horizontal blanking, context B)
(Vertical blanking, context B)
(1 ADC, no column or row skip)
De scrip t io n : Full-resolution VGA image at 30 fps
Co n t e xt A (Alt e rn a t e Co n t e xt )
Reg0xC8
Reg0x07
Reg0x08
Reg0x21
= 0x0000 (Context A)
= 0x0234 (Horizontal blanking, context A)
= 0x010D (Vertical blanking, context A)
= 0x040C (1 ADC, column and row skip)
De scrip t io n : Half-resolution QVGA image at 30 fps
The horizontal blanking and vertical blanking values for the two contexts are chosen so
that row time will be preserved between contexts. This ensures that changing contexts
does not affect integration time. A few more control bits are also available through the
context register (Reg0xC8) so that flash and restarting the sensor can be done simulta-
neously with changing contexts. See Table 6, Register Description, on page 23 for more
information.
PDF: 814eb99f/Source: 8175e929
MT9V012_2.fm - Rev. B 2/05 EN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
32
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