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MT48LC64M4A2FB1 参数 Datasheet PDF下载

MT48LC64M4A2FB1图片预览
型号: MT48LC64M4A2FB1
PDF下载: 下载PDF文件 查看货源
内容描述: SDR SDRAM [SDR SDRAM]
分类和应用: 动态存储器
文件页数/大小: 86 页 / 3693 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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256Mb: x4, x8, x16 SDRAM  
Electrical Specifications – AC Operating Conditions  
Electrical Specifications – AC Operating Conditions  
Table 12: Electrical Characteristics and Recommended AC Operating Conditions  
Notes 1–5 apply to all parameters and conditions  
-6A  
-7E  
-75  
Parameter  
Symbol Min  
Max  
Min  
Max  
5.4  
5.4  
Min  
Max  
5.4  
6
Unit Notes  
Access time from CLK  
(positive edge)  
CL = 3  
CL = 2  
CL = 1  
tAC(3)  
tAC(2)  
tAC(1)  
tAH  
tAS  
tCH  
5.4  
7.56  
176  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ms  
ms  
ns  
ns  
ns  
7
7
7
Address hold time  
Address setup time  
CLK high-level width  
CLK low-level width  
Clock cycle time  
0.8  
1.5  
2.5  
2.5  
6
106  
206  
0.8  
1.5  
0.8  
1.5  
0.8  
1.5  
0.8  
1.5  
2.5  
2.5  
7
0.8  
1.5  
2.5  
2.5  
7.5  
10  
tCL  
CL = 3  
CL = 2  
CL = 1  
tCK(3)  
tCK(2)  
tCK(1)  
tCKH  
tCKS  
tCMH  
tCMS  
tDH  
8
8
8
7.5  
CKE hold time  
CKE setup time  
0.8  
1.5  
0.8  
1.5  
0.8  
1.5  
0.8  
1.5  
0.8  
1.5  
0.8  
1.5  
CS#, RAS#, CAS#, WE#, DQM hold time  
CS#, RAS#, CAS#, WE#, DQM setup time  
Data-in hold time  
Data-in setup time  
tDS  
Data-out High-Z time  
CL = 3  
CL = 2  
CL = 1  
tHZ(3)  
tHZ(2)  
tHZ(1)  
tLZ  
5.4  
7.56  
176  
5.4  
5.4  
5.4  
6
9
9
9
Data-out Low-Z time  
1
1
1
Data-out hold time (load)  
Data-out hold time (no load)  
ACTIVE-to-PRECHARGE command  
tOH  
3
3
3
tOHn  
tRAS  
tRC  
tRCD  
tREF  
1.8  
42  
60  
18  
1.8  
37  
60  
15  
1.8  
44  
66  
20  
10  
11  
120,000  
120,000  
120,000  
ACTIVE-to-ACTIVE command period  
ACTIVE-to-READ or WRITE delay  
Refresh period (8192 rows)  
64  
16  
64  
16  
64  
16  
Refresh period – automotive (8192 rows) tREFAT  
AUTO REFRESH period  
tRFC  
tRP  
tRRD  
60  
18  
12  
66  
15  
14  
66  
20  
15  
PRECHARGE command period  
ACTIVE bank a to ACTIVE bank b com-  
mand  
Transition time  
tT  
tWR  
0.3  
1.2  
0.3  
1.2  
0.3  
1.2  
ns  
ns  
12  
13  
WRITE recovery time  
1 CLK +  
6ns  
1 CLK +  
7ns  
1 CLK +  
7.5ns  
12  
14  
15  
ns  
14  
PDF: 09005aef8091e6d1  
256Mb_sdr.pdf - Rev. R 10/12 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
27  
© 1999 Micron Technology, Inc. All rights reserved.  
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