256Mb: x4, x8, x16 SDRAM
Electrical Specifications
Electrical Specifications
Stresses greater than those listed may cause permanent damage to the device. This is a
stress rating only, and functional operation of the device at these or any other condi-
tions above those indicated in the operational sections of this specification is not im-
plied. Exposure to absolute maximum rating conditions for extended periods may affect
reliability.
Table 7: Absolute Maximum Ratings
Voltage/Temperature
Symbol
VDD/VDDQ
VIN
Min
–1
Max
4.6
4.6
150
1
Unit Notes
Voltage on VDD/VDDQ supply relative to VSS
Voltage on inputs, NC, or I/O balls relative to VSS
Storage temperature (plastic)
Power dissipation
V
1
–1
TSTG
–55
–
°C
W
–
1. VDD and VDDQ must be within 300mV of each other at all times. VDDQ must not exceed
VDD
Note:
.
Table 8: DC Electrical Characteristics and Operating Conditions
Notes 1–3 apply to all parameters and conditions; VDD/VDDQ = 3.3V ±0.3V
Parameter/Condition
Symbol
VDD, VDDQ
VIH
Min
3
Max
Unit
V
Notes
Supply voltage
3.6
Input high voltage: Logic 1; All inputs
Input low voltage: Logic 0; All inputs
Output high voltage: IOUT = –4mA
Output low voltage: IOUT = 4mA
2
VDD + 0.3
V
4
4
VIL
–0.3
2.4
–
0.8
–
V
VOH
V
VOL
0.4
5
V
Input leakage current: Any input 0V ≤ VIN ≤ VDD (All
IL
–5
μA
other balls not under test = 0V)
Output leakage current: DQ are disabled; 0V ≤ VOUT
≤
IOZ
–5
–5
μA
VDDQ
Operating temperature:
Commercial
Industrial
TA
TA
TA
0
70
85
˚C
˚C
˚C
–40
–40
Automotive
105
1. All voltages referenced to VSS.
Notes:
2. The minimum specifications are used only to indicate cycle time at which proper opera-
tion over the full temperature range is ensured; (0°C ≤ TA ≤ +70°C (commercial), –40°C ≤
TA ≤ +85°C (industrial), and –40°C ≤ TA ≤ +105°C (automotive)).
3. An initial pause of 100μs is required after power-up, followed by two AUTO REFRESH
commands, before proper device operation is ensured. (VDD and VDDQ must be powered
up simultaneously. VSS and VSSQ must be at same potential.) The two AUTO REFRESH
command wake-ups should be repeated any time the tREF refresh requirement is excee-
ded.
4. VIH overshoot: VIH,max = VDDQ + 2V for a pulse width ≤ 3ns, and the pulse width cannot
be greater than one-third of the cycle rate. VIL undershoot: VIL,min = –2V for a pulse
width ≤3ns.
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. R 10/12 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
23
© 1999 Micron Technology, Inc. All rights reserved.
MICRON [ MICRON TECHNOLOGY ]
