ADVANCE
128Mb: x16, x32
MOBILE SDRAM
SINGLE WRITE – WITHOUT AUTO PRECHARGE1
T0
T1
T2
T3
T4
T5
T6
T7
T8
t
t
CL
CK
CLK
CKE
t
CH
t
t
CKS
CKH
t
t
CMS
CMH
4
4
COMMAND
ACTIVE
NOP
WRITE
NOP
NOP
PRECHARGE
NOP
ACTIVE
NOP
t
t
CMS
CMH
DQMU, DQML
A0-A9, A11
t
t
t
t
AH
AS
3
ROW
t
COLUMN m
AS
AH
ALL BANKS
ROW
t
ROW
A10
DISABLE AUTO PRECHARGE
BANK
SINGLE BANK
BANK
AS
AH
BA0, BA1
BANK
BANK
t
t
DH
DS
DIN
m
DQ
t
t
RP
2
t
RCD
WR
t
RAS
t
RC
DON’T CARE
TIMING PARAMETERS
-8
-10
-8
-10
SYMBOL*
MIN
1
MAX
MIN
1
MAX UNITS
SYMBOL*
MIN
1
MAX
MIN
1
MAX UNITS
t
t
t
t
t
t
t
t
t
t
AH
ns
ns
ns
ns
ns
ns
ns
ns
ns
CMH
CMS
DH
ns
ns
ns
ns
t
AS
2.5
3
2.5
3
2.5
1
2.5
1
t
CH
t
CL
3
3
DS
2.5
48
80
20
20
15
2.5
50
100
20
20
15
t
CK (3)
8
10
12
25
1
RAS
RC
120,000
120,000
ns
ns
ns
ns
ns
t
CK (2)
10
20
1
t
CK (1)
RCD
RP
t
CKH
t
CKS
2.5
2.5
WR
*CAS latency indicated in parentheses.
NOTE: 1. For this example, the burst length = 1, and the WRITE burst is followed by a “manual” PRECHARGE.
2. 15ns is required between <DIN m> and the PRECHARGE command, regardless of frequency.
3. x16: A9 and A11 = “Don’t Care”
x32: A8, A9,and A11 = “Don’t Care”
4. PRECHARGE command not allowed else tRAS would be violated.
128Mb: x16, x32 Mobile SDRAM
MobileY95W_3V_F.p65 – Rev. F; Pub. 9/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.
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