ADVANCE
128Mb: x16, x32
MOBILE SDRAM
INITIALIZE AND LOAD MODE REGISTER1,2
T1
T0
T3
T5
T7
T9
T19
T29
( (
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( (
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( (
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( (
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( (
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( (
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( (
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( (
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( (
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( (
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CLK
t
CK
t
t
CKS CKH
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( (
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( (
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( (
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CKE
COMMAND5
DQML, DQMU
t
t
CMS CMH
( (
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( (
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( (
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( (
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( (
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( (
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( (
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( (
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4
4
3
4
4
4
ACT
NOP
PRE
LMR
LMR
PRE
AR
AR
( (
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( (
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( (
) )
( (
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( (
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( (
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( (
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( (
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( (
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( (
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( (
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( (
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( (
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( (
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t
t
AS AH
( (
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( (
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( (
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( (
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( (
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( (
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( (
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( (
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( (
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( (
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( (
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( (
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( (
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A0-A9, A11
A10
CODE
CODE
CODE
RA
RA
BA
ALL BANKS
ALL BANKS
( (
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( (
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( (
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( (
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( (
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( (
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( (
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( (
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( (
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( (
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CODE
t
AS
t
AH
t
t
AH
t
AH
t
AS
AS
( (
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( (
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( (
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( (
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( (
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( (
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( (
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( (
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( (
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( (
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( (
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BA0 = L,
BA1 = H
BA0 = L,
BA1 = L
BA0, BA1
DQ
High-Z
( (
) )
((
))
((
))
((
))
((
))
((
))
((
))
T = 100µs
t
t
t
t
RP
t
t
RFC
RP
MRD
MRD
RFC
Power-up:
DD and
CLK stable
Load Extended
Mode Register
Load Mode
Register
V
DON’T CARE
NOTE:
1. The two AUTO REFRESH commands at T9 and T19 may be applied before either LOAD MODE REGISTER (LMR) command.
2. PRE = PRECHARGE command, LMR = LOAD MODE REGISTER command, AR = AUTO REFRESH command, ACT = ACTIVE command, RA = Row Address,
BA = Bank Address
3. Optional refresh command.
4. The Load Mode Register for both MR/EMR and 2 Auto Refresh commands can be in any order. However, all must occur prior to an Active command.
5. Device timing is -10 with 100 MHz clock.
TIMING PARAMETERS
-8
-10
-8
-10
SYMBOL*
MIN
1
MAX
MIN
1
MAX UNITS
SYMBOL*
MIN
1
MAX
MIN
1
MAX UNITS
t
t
AH
ns
ns
ns
ns
ns
ns
ns
CKH
ns
ns
ns
ns
t
t
AS
2.5
3
2.5
3
CKS
2.5
1
2.5
1
t
t
CH
CMH
t
t
CL
3
3
CMS
2.5
2
2.5
2
t
t
t
t
3
t
CK (3)
8
10
12
25
MRD
RFC
RP
CK
t
CK (2)
10
20
80
20
100
20
ns
ns
t
CK (1)
*CAS latency indicated in parentheses.
128Mb: x16, x32 Mobile SDRAM
MobileY95W_3V_F.p65 – Rev. F; Pub. 9/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.
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