64Mb: x32
SDRAM
FUNCTIONAL BLOCK DIAGRAM
2 Meg x 32 SDRAM
CKE
CLK
CS#
WE#
CAS#
RAS#
CONTROL
LOGIC
BANK3
BANK2
BANK1
BANK0
COMMAND
DECODE
MODE REGISTER
REFRESH 11
COUNTER
11
11
ROW-
ADDRESS
MUX
11
BANK0
ROW-
ADDRESS
LATCH
&
DECODER
2048
BANK0
MEMORY
ARRAY
(2,048 x 256 x 32)
4
4
DQM0-
DQM3
SENSE AMPLIFIERS
32
8192
DATA
OUTPUT
REGISTER
2
A0-A10,
BA0, BA1
ADDRESS
REGISTER
BANK
CONTROL
LOGIC
13
I/O GATING
DQM MASK LOGIC
READ DATA LATCH
WRITE DRIVERS
32
256
(x32)
DATA
INPUT
REGISTER
32
DQ0-
DQ31
2
COLUMN
DECODER
COLUMN-
ADDRESS
COUNTER/
LATCH
8
8
64Mb: x32 SDRAM
64MSDRAMx32_5.p65 – Rev. B; Pub. 6/02
4
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.
MICRON [ MICRON TECHNOLOGY ]
