64Mb: x32
SDRAM
FUNCTIONALBLOCKDIAGRAM
2 Meg x 32 SDRAM
CKE
CLK
CONTROL
LOGIC
CS#
WE#
BANK3
CAS#
RAS#
BANK2
BANK1
BANK0
REFRESH
COUNTER
11
MODE REGISTER
11
BANK0
ROW-
ADDRESS
LATCH
&
ROW-
ADDRESS
MUX
11
BANK0
MEMORY
ARRAY
4
4
2048
DQM0-
DQM3
11
(2,048 x 256 x 32)
DECODER
DATA
OUTPUT
REGISTER
SENSE AMPLIFIERS
8192
32
DQ0-
DQ31
I/O GATING
2
32
DQM MASK LOGIC
READ DATA LATCH
WRITE DRIVERS
BANK
CONTROL
LOGIC
A0-A10,
BA0, BA1
ADDRESS
REGISTER
13
DATA
INPUT
REGISTER
2
32
256
(x32)
COLUMN
DECODER
COLUMN-
ADDRESS
COUNTER/
LATCH
8
8
64Mb: x32 SDRAM
64MSDRAMx32_5.p65 – Rev. B; Pub. 6/02
MicronTechnology,Inc.,reservestherighttochangeproductsorspecificationswithoutnotice.
©2002,MicronTechnology,Inc.
4
MICRON [ MICRON TECHNOLOGY ]
