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MT41J256M4 参数 Datasheet PDF下载

MT41J256M4图片预览
型号: MT41J256M4
PDF下载: 下载PDF文件 查看货源
内容描述: DDR3 SDRAM MT41J256M4 â ????梅格32 ×4× 8银行MT41J128M8 â ????梅格16 ×8× 8银行MT41J64M16 â ???? 8梅格×16× 8银行 [DDR3 SDRAM MT41J256M4 – 32 Meg x 4 x 8 banks MT41J128M8 – 16 Meg x 8 x 8 banks MT41J64M16 – 8 Meg x 16 x 8 banks]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 214 页 / 2938 K
品牌: MICRON [ MICRON TECHNOLOGY ]
 浏览型号MT41J256M4的Datasheet PDF文件第74页浏览型号MT41J256M4的Datasheet PDF文件第75页浏览型号MT41J256M4的Datasheet PDF文件第76页浏览型号MT41J256M4的Datasheet PDF文件第77页浏览型号MT41J256M4的Datasheet PDF文件第79页浏览型号MT41J256M4的Datasheet PDF文件第80页浏览型号MT41J256M4的Datasheet PDF文件第81页浏览型号MT41J256M4的Datasheet PDF文件第82页  
1Gb: x4, x8, x16 DDR3 SDRAM  
Speed Bin Tables  
Table 55: DDR3-2133 Speed Bins  
DDR3-2133 Speed Bin  
-0931  
CL-tRCD-tRP  
14-14-14  
Parameter  
Symbol  
tAA  
tRCD  
tRP  
tRC  
tRAS  
Min  
13.09  
13.09  
13.09  
46.13  
33  
Max  
Unit  
Notes  
Internal READ command to first data  
ACTIVATE to internal READ or WRITE delay time  
PRECHARGE command period  
ACTIVATE-to-ACTIVATE or REFRESH command period  
ACTIVATE-to-PRECHARGE command period  
20  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
CK  
CK  
9 x tREFI  
3.3  
2
3
4
3
4
4
3
4
3
4
4
3
4
3
4
4
3
4
4
4
4
3
4
3
CL = 5  
CL = 6  
CL = 7  
CL = 8  
CWL = 5  
tCK (AVG)  
tCK (AVG)  
tCK (AVG)  
tCK (AVG)  
tCK (AVG)  
tCK (AVG)  
tCK (AVG)  
tCK (AVG)  
tCK (AVG)  
tCK (AVG)  
tCK (AVG)  
tCK (AVG)  
tCK (AVG)  
tCK (AVG)  
tCK (AVG)  
tCK (AVG)  
tCK (AVG)  
tCK (AVG)  
tCK (AVG)  
tCK (AVG)  
tCK (AVG)  
tCK (AVG)  
tCK (AVG)  
3.0  
CWL = 6, 7, 8, 9  
CWL = 5  
Reserved  
2.5  
3.3  
CWL = 6, 7, 8, 9  
CWL = 5, 7, 8, 9  
CWL = 6  
Reserved  
Reserved  
1.875  
<2.5  
<2.5  
CWL = 5, 8, 9  
CWL = 6  
Reserved  
1.875  
CWL = 7  
Reserved  
Reserved  
CL = 9  
CWL = 5, 6, 8, 9  
CWL = 7  
1.5  
1.5  
<1.875  
Reserved  
<1.875  
Reserved  
CL = 10  
CWL = 5, 6, 9  
CWL = 7  
CWL = 8  
CL = 11  
CWL = 5, 6, 7  
CWL = 8  
Reserved  
1.25  
<1.5  
CWL = 9  
Reserved  
Reserved  
Reserved  
Reserved  
CL = 12  
CL = 13  
CL = 14  
CWL = 5, 6, 7, 8  
CWL = 9  
CWL = 5, 6, 7, 8  
CWL = 9  
1.071  
<1.25  
Reserved  
<1.071  
CWL = 5, 6, 7, 8, 9  
CWL = 10  
Reserved  
0.938  
Supported CL settings  
Supported CWL settings  
5, 6, 7, 8, 9, 10, 11, 13, 14  
5, 6, 7, 8, 9  
1. The -093 speed grade is backward compatible with 1866, CL = 13 (-107) , 1600, CL = 11  
(-125) , 1333, CL = 9 (-15E) and 1066, CL = 7 (-187E).  
Notes:  
2. tREFI depends on TOPER  
.
3. The CL and CWL settings result in tCK requirements. When making a selection of tCK,  
both CL and CWL requirement settings need to be fulfilled.  
4. Reserved settings are not allowed.  
PDF: 09005aef826aa906  
1Gb_DDR3_SDRAM.pdf - Rev. L 03/13 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
78  
‹ 2006 Micron Technology, Inc. All rights reserved.  
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