Table 56: Electrical Characteristics and AC Operating Conditions (Continued)
Notes 1–8 apply to the entire table
DDR3-800
Min Max
DQ Input Timing
DDR3-1066
DDR3-1333
DDR3-1600
Parameter
Symbol
Min
Max
Min
Max
Min
Max
Unit Notes
Data setup time to
DQS, DQS#
Base (specification)
tDS
(AC175)
75
–
25
–
–
–
–
–
ps
18, 19,
44
V
REF @ 1 V/ns
250
125
–
–
200
75
–
–
–
–
–
–
–
–
ps
ps
19, 20
Data setup time to
DQS, DQS#
Base (specification)
tDS
(AC150)
30
10
18, 19,
44
V
REF @ 1 V/ns
Base (specification)
REF @ 1 V/ns
Base (specification)
REF @ 1 V/ns
275
–
–
–
–
–
–
–
250
–
–
–
–
–
–
–
180
–
–
–
–
–
–
–
160
–
–
–
–
–
–
–
ps
ps
ps
ps
ps
ps
19, 20
18, 19
19, 20
18, 19
19, 20
41
Data setup time to
DQS, DQS#
tDS
(AC135)
V
–
–
–
–
Data hold time from
DQS, DQS#
tDH
(DC100)
150
250
600
100
200
490
65
165
400
45
145
360
V
Minimum data pulse width
tDIPW
DQ Output Timing
DQS, DQS# to DQ skew, per access
tDQSQ
tQH
–
200
–
–
150
–
–
125
–
–
100
–
ps
tCK
DQ output hold time from DQS, DQS#
0.38
0.38
0.38
0.38
21
(AVG)
DQ Low-Z time from CK, CK#
DQ High-Z time from CK, CK#
tLZDQ
tHZDQ
–800
–
400
400
–600
–
300
300
–500
–
250
250
–450
–
225
225
ps
ps
22, 23
22, 23
DQ Strobe Input Timing
DQS, DQS# rising to CK, CK# rising
tDQSS
tDQSL
tDQSH
–0.25
0.45
0.45
0.25
0.55
0.55
–0.25
0.45
0.45
0.25
0.55
0.55
–0.25
0.45
0.45
0.25
0.55
0.55
–0.27
0.45
0.45
0.27
0.55
0.55
CK
CK
CK
25
DQS, DQS# differential input low pulse width
DQS, DQS# differential input high pulse
width
DQS, DQS# falling setup to CK, CK# rising
DQS, DQS# falling hold from CK, CK# rising
DQS, DQS# differential WRITE preamble
DQS, DQS# differential WRITE postamble
tDSS
tDSH
tWPRE
tWPST
0.2
0.2
0.9
0.3
–
–
–
–
0.2
0.2
0.9
0.3
–
–
–
–
0.2
0.2
0.9
0.3
–
–
–
–
0.18
0.18
0.9
–
–
–
–
CK
CK
CK
CK
25
25
0.3
DQ Strobe Output Timing
DQS, DQS# rising to/from rising CK, CK#
tDQSCK
tDQSCK
–400
1
400
10
–300
1
300
10
–255
1
255
10
–225
1
225
10
ps
ns
23
26
DQS, DQS# rising to/from rising CK, CK#
when DLL is disabled
(DLL_DIS)