8, 16, 32 MEG x 64
NONBUFFERED DRAM DIMMs
ICC OPERATING CONDITIONS AND MAXIMUM LIMITS
(Notes: 1, 5, 6) (VDD = +3.3V 0.3V)
M AX
PARAMETER/CONDITION
SYMBOL SIZE
-5
-6
UNITS NOTES
STANDBY CURRENT: TTL
(RAS# = CAS# = VIH)
64MB
128MB
256MB
8
16
32
8
16
32
ICC1
ICC2
ICC3
ICC4
ICC5
ICC6
mA
STANDBY CURRENT: CMOS
(RAS# = CAS# = VDD - 0.2V)
64MB
128MB
256MB
4
8
16
4
8
16
mA
OPERATING CURRENT: Random READ/WRITE
Average power supply current
(RAS#, CAS#, address cycling: RC = RC [MIN])
64MB 1,400 1,320
128MB 2,720 2,560
256MB 2,736 2,576
mA
mA
mA
mA
3, 24
3, 24
3, 24
3, 4
t
t
OPERATING CURRENT: EDO PAGE MODE
Average power supply current
(RAS# = VIL, CAS#, address cycling: PC = PC [MIN])
64MB 1,240 1,000
128MB 2,400 1,920
256MB 2,416 1,936
t
t
REFRESH CURRENT: RAS#-ONLY
Average power supply current
(RAS# cycling, CAS# = VIH: RC = RC [MIN])
64MB 1,400 1,320
128MB 2,720 2,560
256MB 2,736 2,576
t
t
REFRESH CURRENT: CBR
Average power supply current
(RAS#, CAS#, address cycling: RC = RC [MIN])
64MB 1,320 1,240
128MB 2,560 2,400
256MB 2,576 2,416
t
t
CAPACITANCE
M AX
PARAMETER
SYMBOL 64MB 128MB 256MB UNITS NOTES
Input Capacitance: A0-A11
CI1
CI2
CI3
CI4
CI5
CIO
46
32
32
10
6
86
60
60
18
6
168
118
60
32
6
pF
pF
pF
pF
pF
pF
2
2
2
2
2
2
Input Capacitance: WE0#, WE2#, OE0#, OE2#
Input Capacitance: RAS0#-RAS3#
Input Capacitance: CAS0#-CAS7#
Input Capacitance: SCL, SA0-SA2
Input/Output Capacitance: DQ0-DQ63, SDA
12
12
22
8, 16, 32 Meg x 64 Nonbuffered DRAM DIMMs
DM78.p65 – Rev. 2/99
MicronTechnology,Inc.,reservestherighttochangeproductsorspecificationswithoutnotice.
©1999,MicronTechnology,Inc.
10
MICRON [ MICRON TECHNOLOGY ]
