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    M29W256GL 参数 Datasheet PDF下载

    M29W256GL图片预览
    型号： M29W256GL
    PDF下载： 下载PDF文件 查看货源
    内容描述： 并行NOR闪存的嵌入式存储器 [Parallel NOR Flash Embedded Memory]
    分类和应用： 闪存存储
    文件页数/大小： 89 页 / 1158 K
    品牌： MICRON [ MICRON TECHNOLOGY ]
     浏览型号M29W256GL的Datasheet PDF文件第1页浏览型号M29W256GL的Datasheet PDF文件第2页浏览型号M29W256GL的Datasheet PDF文件第3页浏览型号M29W256GL的Datasheet PDF文件第4页浏览型号M29W256GL的Datasheet PDF文件第6页浏览型号M29W256GL的Datasheet PDF文件第7页浏览型号M29W256GL的Datasheet PDF文件第8页浏览型号M29W256GL的Datasheet PDF文件第9页  
    256Mb: 3V Embedded Parallel NOR Flash
    Features
    List of Figures
    Figure 1: Logic Diagram ................................................................................................................................... 7
    Figure 2: 44-Pin SO (Top View) ........................................................................................................................ 8
    Figure 3: 44-Pin SO (Top View) ........................................................................................................................ 8
    Figure 4: 48-Pin TSOP (Top View) .................................................................................................................... 9
    Figure 5: 48-Pin TSOP (Top View) .................................................................................................................. 10
    Figure 6: 48-Pin TSOP (Top View) .................................................................................................................. 10
    Figure 7: 48-Pin TSOP (Top View) .................................................................................................................. 11
    Figure 8: 56-Pin TSOP (Top View) .................................................................................................................. 12
    Figure 9: 56-Pin TSOP (Top View) .................................................................................................................. 12
    Figure 10: 56-Pin TSOP (Top View) ................................................................................................................. 13
    Figure 11: 48-Ball Fortified BGA and 48-Ball TBGA .......................................................................................... 15
    Figure 12: 48-Ball Fortified BGA and 48-Ball TBGA .......................................................................................... 16
    Figure 13: 48-Ball Fortified BGA and 48-Ball TBGA .......................................................................................... 17
    Figure 14: 48-Ball Fortified BGA and 48-Ball TBGA .......................................................................................... 18
    Figure 15: 64-Ball Fortified BGA and 64-Ball TBGA .......................................................................................... 19
    Figure 16: 64-Ball Fortified BGA and 64-Ball TBGA .......................................................................................... 20
    Figure 17: 64-Ball Fortified BGA and 64-Ball TBGA .......................................................................................... 21
    Figure 18: 64-Ball Fortified BGA and 64-Ball TBGA .......................................................................................... 22
    Figure 19: Data Polling Flowchart ................................................................................................................... 29
    Figure 20: Toggle Bit Flowchart ...................................................................................................................... 30
    Figure 21: Status Register Polling Flowchart .................................................................................................... 31
    Figure 22: Lock Register Program Flowchart ................................................................................................... 33
    Figure 23: WRITE TO BUFFER PROGRAM Flowchart ...................................................................................... 43
    Figure 24: ENHANCED BUFFERED PROGRAM Flowchart ............................................................................... 47
    Figure 25: Program/Erase Nonvolatile Protection Bit Algorithm ...................................................................... 56
    Figure 26: Software Protection Scheme .......................................................................................................... 61
    Figure 27: Power-Up Timing .......................................................................................................................... 66
    Figure 28: Reset AC Timing – No PROGRAM/ERASE Operation in Progress ...................................................... 67
    Figure 29: Reset AC Timing During PROGRAM/ERASE Operation .................................................................... 68
    Figure 30: AC Measurement Load Circuit ....................................................................................................... 70
    Figure 31: AC Measurement I/O Waveform ..................................................................................................... 70
    Figure 32: Random Read AC Timing (8-Bit Mode) ........................................................................................... 74
    Figure 33: Random Read AC Timing (16-Bit Mode) ......................................................................................... 74
    Figure 34: Page Read AC Timing (16-Bit Mode) ............................................................................................... 75
    Figure 35: WE#-Controlled Program AC Timing (8-Bit Mode) .......................................................................... 77
    Figure 36: WE#-Controlled Program AC Timing (16-Bit Mode) ......................................................................... 78
    Figure 37: CE#-Controlled Program AC Timing (8-Bit Mode) ........................................................................... 80
    Figure 38: CE#-Controlled Program AC Timing (16-Bit Mode) ......................................................................... 81
    Figure 39: Chip/Block Erase AC Timing (8-Bit Mode) ...................................................................................... 82
    Figure 40: Accelerated Program AC Timing ..................................................................................................... 83
    Figure 41: Data Polling AC Timing .................................................................................................................. 84
    Figure 42: Toggle/Alternative Toggle Bit Polling AC Timing (8-Bit Mode) .......................................................... 84
    Figure 43: 56-Pin TSOP – 14mm x 20mm ........................................................................................................ 86
    Figure 44: 64-Pin TBGA – 10mm x 13mm ........................................................................................................ 87
    Figure 45: 64-Ball Fortified BGA – 11mm x 13mm ........................................................................................... 88
    PDF: 09005aef84bd3b68
    m29w_256mb.pdf - Rev. B 5/13 EN
    5
    Micron Technology, Inc. reserves the right to change products or specifications without notice.
    ©
    2013 Micron Technology, Inc. All rights reserved.

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