128Mb 3V Embedded Parallel NOR Flash
Write AC Characteristics
Figure 23: CE#-Controlled Program AC Timing (8-Bit Mode)
3rd cycle 4th cycle
Data polling
PA
tWC
AAAh
tAS
PA
A[22:0]/A-1
WE#
tAH
tWH
tWS
tGHEL
OE#
CE#
tCP
tCPH
tWHWH1
tDS
DQ[7:0]
AOh
tDH
PD
DQ7#
D
OUT
1. Only the third and fourth cycles of the PROGRAM command are represented. The PRO-
GRAM command is followed by checking of the status register data polling bit.
Notes:
2. PA is the address of the memory location to be programmed. PD is the data to be pro-
grammed.
3. DQ7 is the complement of the data bit being programmed to DQ7 (See Data Polling Bit
[DQ7]).
4. See the following tables for timing details: Read AC Characteristics, WE#-Controlled
Write AC Characteristics, and CE#-Controlled Write AC Characteristics.
PDF: 09005aef84daa141
m29w_128mb.pdf - Rev. A 7/13 EN
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