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JS28F640J3F75A 参数 Datasheet PDF下载

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型号: JS28F640J3F75A
PDF下载: 下载PDF文件 查看货源
内容描述: Numonyx®嵌入式闪存( J3 65 nm)的单细胞每比特( SBC ) [Numonyx® Embedded Flash Memory (J3 65 nm) Single Bit per Cell (SBC)]
分类和应用: 闪存
文件页数/大小: 66 页 / 2203 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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Numonyx® Embedded Flash Memory (J3 65 nm) Single Bit per Cell (SBC)  
7.2  
Program, Erase, Block-Lock Specifications  
Table 13: Configuration Performance  
#
Symbol  
Parameter  
Typ  
Max  
Unit  
Notes  
W200  
tPROG/W  
Program Time  
Single word  
40  
128  
400  
720  
1.0  
50  
175  
654  
2000  
3600  
4.0  
60  
µs  
µs  
1,2,3,4,6  
1,2,3,4,5,6  
1,2,3,4,5,6  
1,2,3,4,5,6  
1,2,3,4,6  
1,2,3,4,6  
1,2,3,4,6  
1,2,3,6  
1,2,3,6  
1,7  
Aligned 16 Words BP Time (32 Bytes)  
Aligned 128 Words BP Time (256 Bytes)  
Aligned 256 Words BP Time  
W250  
tPROG  
Buffer Program Time  
µs  
µs  
W501  
W650  
W651  
W600  
W601  
W602  
W652  
W702  
tERS/AB  
tlks  
Block Erase Time  
sec  
µs  
Set Lock-Bit Time  
tlkc  
Clear Block Lock-Bits Time  
0.5  
15  
1
sec  
µs  
tSUSP/P  
tSUSP/E  
Program Suspend Latency Time to Read  
Erase Suspend Latency Time to Read  
20  
15  
20  
µs  
tERS/SUSP Erase to Suspend  
500  
500  
3.2  
µs  
tSTS  
STS Pulse Width Low Time  
blank check  
ns  
1
tBC/MB  
Array Block  
ms  
Notes:  
1.  
Typical values measured at TA = +25 °C and nominal voltages. Assumes corresponding lock-bits are not set. Subject to  
change based on device characterization.  
2.  
3.  
4.  
5.  
6.  
These performance numbers are valid for all speed versions.  
Sampled but not 100% tested.  
Excludes system-level overhead.  
These values are valid when the buffer is full, and the start address is aligned.  
Max values are measured at worst case temperature, data pattern and VCC corner within 100K cycles. But for W650, W651,  
W600 and W601, the Max value are expressed at +25 °C or -40 °C.  
W602 is the typical time between an initial block erase or erase resume command and then a subsequent erase suspend  
command. Violating the specification repeatedly during any particular block erase may cause erase failures.  
7.  
7.3  
Reset Specifications  
Figure 12: AC Waveform for Reset Operation  
STS (R)  
P1  
P2  
RP# (P)  
P3  
Vcc  
Note: STS is shown in its default mode (RY/BY#).  
Datasheet  
28  
Jan 2011  
208032-03  
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