256Mb and 512Mb (256Mb/256Mb), P30-65nm
AC Write Specifications
AC Write Specifications
Table 46: AC Write Specifications
Number
W1
Symbol
tPHWL
tELWL
Parameter
Min
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
1, 2, 3
1, 2, 3
1, 2, 4
1, 2, 12
1, 2
RST# high recovery to WE# low
CE# setup to WE# low
WE# write pulse width low
Data setup to WE# high
Address setup to WE# high
CE# hold from WE# high
Data hold from WE# high
Address hold from WE# high
WE# pulse width high
VPP setup to WE# high
VPP hold from Status read
WP# hold from Status read
WP# setup to WE# high
WE# high to OE# low
150
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
W2
0
W3
tWLWH
tDVWH
tAVWH
tWHEH
tWHDX
tWHAX
tWHWL
tVPWH
tQVVL
50
W4
50
W5
50
W6
0
W7
0
W8
0
W9
20
1, 2, 5
W10
W11
W12
W13
W14
W16
200
1, 2, 3, 7
0
tQVBL
0
200
1, 2, 3, 7
1, 2, 9
tBHWH
tWHGL
tWHQV
0
WE# high to read valid
tAVQV + 35
1, 2, 3, 6,
10
Write to Asynchronous Read Specifications
W18 tWHAV WE# high to Address valid
Write to Synchronous Read Specifications
0
-
ns
1, 2, 3, 6, 8
W19
W20
W28
tWHCH/L
tWHVH
tWHVL
WE# high to Clock valid
WE# high to ADV# high
WE# high to ADV# low
19
19
7
-
-
-
ns
ns
ns
1, 2, 3, 6,
10
Write Specifications with Clock Active
W21
W22
tVHWL
tCHWL
Notes:
ADV# high to WE# low
Clock high to WE# low
-
-
20
20
ns
ns
1, 2, 3, 11
1. Write timing characteristics during erase suspend are the same as write-only operations.
2. A write operation can be terminated with either CE# or WE#.
3. Sampled, not 100% tested.
4. Write pulse width low (tWLWH or tELEH) is defined from CE# or WE# low (whichever occurs
last) to CE# or WE# high (whichever occurs first). Thus, tWLWH = tELEH = tWLEH = tELWH
.
5. Write pulse width high (tWHWL or tEHEL) is defined from CE# or WE# high (whichever oc-
curs first) to CE# or WE# low (whichever occurs last). Thus, tWHWL = tEHEL = tWHEL = tEHWL).
6. tWHVH or tWHCH/L must be met when transiting from a write cycle to a synchronous burst
read.
7. VPP and WP# should be at a valid level until erase or program success is determined.
8. This specification is only applicable when transiting from a write cycle to an asynchro-
nous read. See spec W19 and W20 for synchronous read.
9. When doing a Read Status operation following any command that alters the Status Reg-
ister, W14 is 20 ns.
PDF: 09005aef84566799
p30_65nm_256Mb-512mb.pdf - Rev. A 1/13 EN
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