256Mb and 512Mb (256Mb/256Mb), P30-65nm
AC Read Specifications
AC Read Specifications
Table 45: AC Read Specifications
Number Symbol Parameter
Asynchronous Specifications
Min
Max
Unit
Note
R1
R2
R3
tAVAV
tAVQV
tELQV
Read cycle time
Easy BGA/QUAD+
TSOP
100
110
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
-
-
Address to output valid
CE# low to output valid
Easy BGA/QUAD+
TSOP
100
110
100
110
25
-
-
-
Easy BGA/QUAD+
TSOP
-
-
R4
R5
R6
R7
R8
tGLQV
tPHQV
tELQX
tGLQX
tEHQZ
OE# low to output valid
RST# high to output valid
CE# low to output in low-Z
OE# low to output in low-Z
-
-
1, 2
1
150
-
0
0
-
1, 3
1, 2, 3
1, 3
-
CE# high to output in high-
Z
20
R9
tGHQZ
tOH
OE# high to output in high-
Z
-
15
-
ns
ns
R10
Output hold from first oc-
curring address, CE#, or OE#
change
0
R11
R12
R13
R15
R16
R17
tEHEL
tELTV
tEHTZ
tGLTV
tGLTX
tGHTZ
CE# pulse width high
17
-
-
ns
ns
ns
ns
ns
ns
1
CE# low to WAIT valid
CE# high to WAIT high-Z
OE# low to WAIT valid
OE# low to WAIT in low-Z
OE# high to WAIT in high-Z
17
20
17
-
-
1, 3
1
-
0
-
1, 3
20
Latching Specifications
R101
R102
R103
tAVVH
tELVH
tVLQV
Address setup to ADV# high
CE# low to ADV# high
10
10
-
-
ns
ns
ns
ns
ns
ns
ns
1
-
ADV# low to output valid
Easy BGA/QUAD+
TSOP
100
-
110
R104
R105
R106
tVLVH
tVHVL
tVHAX
ADV# pulse width low
ADV# pulse width high
10
10
9
-
-
-
Address hold from ADV#
high
1, 4
1
R108
R111
tAPA
Page address access
-
25
-
ns
ns
tPHVH
RST# high to ADV# high
30
Clock Specifications
PDF: 09005aef84566799
p30_65nm_256Mb-512mb.pdf - Rev. A 1/13 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
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