PIC32
Revision L (January 2013)
This revision includes the following updates:
• The following sections were added or updated:
- Section 2.1 “Devices with Dual Flash
Panel and Dual Boot Regions” (new)
- Section 4.3 “Power Requirements”
- Section 13.0 “Initiating a Flash Row Write”
- Section 16.1.1 “2-wire ICSP EJTAG RATE”
• Updated the Device Configuration Register Mask
Values (see Table 17-1)
• The following devices were added to the Code
Memory Size table and the Device IDs and Revision
table (see Table 5-1 and Table 18-4):
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PIC32MZ0256ECE064
PIC32MZ0256ECE100
PIC32MZ0256ECE124
PIC32MZ0256ECE144
PIC32MZ0256ECF064
PIC32MZ0256ECF100
PIC32MZ0256ECF124
PIC32MZ0256ECF144
PIC32MZ0512ECE064
PIC32MZ0512ECE100
PIC32MZ0512ECE124
PIC32MZ0512ECE144
PIC32MZ0512ECF064
PIC32MZ0512ECF100
PIC32MZ0512ECF124
PIC32MZ0512ECF144
PIC32MZ1024ECE064
PIC32MZ1024ECE100
PIC32MZ1024ECE124
PIC32MZ1024ECE144
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PIC32MZ1024ECF064
PIC32MZ1024ECF100
PIC32MZ1024ECF124
PIC32MZ1024ECF144
PIC32MZ1024ECG064
PIC32MZ1024ECG100
PIC32MZ1024ECG124
PIC32MZ1024ECG144
PIC32MZ1024ECH064
PIC32MZ1024ECH100
PIC32MZ1024ECH124
PIC32MZ1024ECH144
PIC32MZ2048ECG064
PIC32MZ2048ECG100
PIC32MZ2048ECG124
PIC32MZ2048ECG144
PIC32MZ2048ECH064
PIC32MZ2048ECH100
PIC32MZ2048ECH124
PIC32MZ2048ECH144
• Note 3 and Note 4 and the GET_CHECKSUMand
QUAD_WORD_PRGMcommands were added to the
PE Command Set (see Table 16-2)
• Added Section 16.2.15 “GET_CHECKSUM
Command”
• Added Section 16.2.16
“QUAD_WORD_PROGRAM Command”
• Updated all addresses in DEVCFG Locations
(see Table 18-1 and Table 18-2)
• Added Configuration Word Locations for
PIC32MZ EC Family Devices (see Table 18-3)
• Updated Section 18.2 “Device Code Protection
bit (CP)”
• Updated Section 18.3 “Program Write Protection
bits (PWP)”
• All references to Test mode were updated to
Programming mode throughout the document
• Minor updates to text and formatting were
incorporated through the document
2007-2013 Microchip Technology Inc.
DS61145L-page 65
MICROCHIP [ MICROCHIP ]
