PIC24FJ64GA104 FAMILY
REGISTER 7-13: IEC3: INTERRUPT ENABLE CONTROL REGISTER 3
U-0
—
R/W-0
RTCIE
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
bit 15
bit 8
bit 0
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
R/W-0
R/W-0
U-0
—
MI2C2IE
SI2C2IE
bit 7
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 15
bit 14
Unimplemented: Read as ‘0’
RTCIE: Real-Time Clock/Calendar Interrupt Enable bit
1= Interrupt request enabled
0= Interrupt request not enabled
bit 13-3
bit 2
Unimplemented: Read as ‘0’
MI2C2IE: Master I2C2 Event Interrupt Enable bit
1= Interrupt request enabled
0= Interrupt request not enabled
bit 1
bit 0
SI2C2IE: Slave I2C2 Event Interrupt Enable bit
1= Interrupt request enabled
0= Interrupt request not enabled
Unimplemented: Read as ‘0’
DS39951C-page 80
2010 Microchip Technology Inc.