PIC24FJ64GA104 FAMILY
REGISTER 7-12: IEC2: INTERRUPT ENABLE CONTROL REGISTER 2
U-0
—
U-0
—
R/W-0
U-0
—
U-0
—
U-0
—
R/W-0
OC5IE
U-0
—
PMPIE
bit 15
bit 8
R/W-0
IC5IE
R/W-0
IC4IE
R/W-0
IC3IE
U-0
—
U-0
—
U-0
—
R/W-0
R/W-0
SPI2IE
SPF2IE
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 15-14
bit 13
Unimplemented: Read as ‘0’
PMPIE: Parallel Master Port Interrupt Enable bit
1= Interrupt request enabled
0= Interrupt request not enabled
bit 12-10
bit 9
Unimplemented: Read as ‘0’
OC5IE: Output Compare Channel 5 Interrupt Enable bit
1= Interrupt request enabled
0= Interrupt request not enabled
bit 8
bit 7
Unimplemented: Read as ‘0’
IC5IE: Input Capture Channel 5 Interrupt Enable bit
1= Interrupt request enabled
0= Interrupt request not enabled
bit 6
bit 5
IC4IE: Input Capture Channel 4 Interrupt Enable bit
1= Interrupt request enabled
0= Interrupt request not enabled
IC3IE: Input Capture Channel 3 Interrupt Enable bit
1= Interrupt request enabled
0= Interrupt request not enabled
bit 4-2
bit 1
Unimplemented: Read as ‘0’
SPI2IE: SPI2 Event Interrupt Enable bit
1= Interrupt request enabled
0= Interrupt request not enabled
bit 0
SPF2IE: SPI2 Fault Interrupt Enable bit
1= Interrupt request enabled
0= Interrupt request not enabled
2010 Microchip Technology Inc.
DS39951C-page 79
MICROCHIP [ MICROCHIP ]
