PIC24FJ64GA104 FAMILY
TABLE 1-2:
PIC24FJ64GA104 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Pin Number
Input
Buffer
28-Pin
SPDIP/
SOIC/SSOP
44-Pin
QFN/
TQFP
Function
I/O
Description
28-Pin
QFN
RP0
4
1
21
22
23
24
33
41
42
43
44
1
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
Remappable Peripheral (input or output).
RP1
5
2
RP2
6
3
RP3
7
4
RP4
11
14
15
16
17
18
21
22
23
24
25
26
—
—
—
—
—
—
—
—
—
—
25
17
7
8
RP5
11
12
13
14
15
18
19
20
21
22
23
—
—
—
—
—
—
—
—
—
—
22
14
4
RP6
RP7
RP8
RP9
RP10
RP11
RP12
RP13
RP14
RP15
RP16
RP17
RP18
RP19
RP20
RP21
RP22
RP23
RP24
RP25
RTCC
SCL1
SCL2
SDA1
SDA2
SOSCI
SOSCO
T1CK
TCK
8
9
10
11
14
15
25
26
27
36
37
38
2
3
4
5
14
44
24
1
Real-Time Clock Alarm/Seconds Pulse Output.
I2C1 Synchronous Serial Clock Input/Output.
I2C2 Synchronous Serial Clock Input/Output.
I2C1 Data Input/Output.
2
I/O
I/O
I/O
I/O
I
I C
2
I C
2
18
6
15
3
I C
2
23
33
34
34
13
35
32
12
I C
I2C2 Data Input/Output.
11
12
12
17
21
18
22
8
ANA
ANA
ST
Secondary Oscillator/Timer1 Clock Input.
Secondary Oscillator/Timer1 Clock Output.
Timer1 Clock Input.
9
O
9
I
14
18
15
19
I
ST
JTAG Test Clock Input.
TDI
I
ST
JTAG Test Data Input.
TDO
O
—
JTAG Test Data Output.
TMS
I
ST
JTAG Test Mode Select Input.
Legend:
TTL = TTL input buffer
ANA = Analog level input/output
ST = Schmitt Trigger input buffer
I C™ = I C/SMBus input buffer
2
2
2010 Microchip Technology Inc.
DS39951C-page 17
MICROCHIP [ MICROCHIP ]
