PIC24FJ64GA104 FAMILY
TABLE 1-1:
DEVICE FEATURES FOR THE PIC24FJ64GA104 FAMILY
Features
PIC24FJ32GA102 PIC24FJ64GA102 PIC24FJ32GA104 PIC24FJ64GA104
Operating Frequency
DC – 32 MHz
Program Memory (bytes)
Program Memory (instructions)
Data Memory (bytes)
32K
64K
32K
64K
11,008
22,016
11,008
22,016
8,192
Interrupt Sources (soft vectors/
NMI traps)
45 (41/4)
I/O Ports
Ports A and B
Ports A, B, C
Total I/O Pins
21
16
35
26
Remappable Pins
Timers:
Total Number (16-bit)
32-Bit (from paired 16-bit timers)
Input Capture Channels
Output Compare/PWM Channels
Input Change Notification Interrupt
Serial Communications:
UART
5(1)
2
5(1)
5(1)
21
31
2(1)
2(1)
2
SPI (3-wire/4-wire)
I2C™
Parallel Communications (PMP/PSP)
JTAG Boundary Scan
Yes
Yes
10-Bit Analog-to-Digital Module
(input channels)
10
13
Analog Comparators
CTMU Interface
3
Yes
Resets (and delays)
POR, BOR, RESETInstruction, MCLR, WDT; Illegal Opcode,
REPEATInstruction, Hardware Traps, Configuration Word Mismatch
(PWRT, OST, PLL Lock)
Instruction Set
Packages
76 Base Instructions, Multiple Addressing Mode Variations
28-Pin QFN, SOIC, SSOP and SPDIP
44-Pin QFN and TQFP
Note 1: Peripherals are accessible through remappable pins.
2010 Microchip Technology Inc.
DS39951C-page 11