PIC18F2420/2520/4420/4520
TABLE 15-5: REGISTERS ASSOCIATED WITH PWM AND TIMER2
Reset
Values
on page
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTCON
RCON
PIR1
GIE/GIEH PEIE/GIEL TMR0IE
INT0IE
RI
RBIE
TO
TMR0IF
PD
INT0IF
POR
RBIF
BOR
49
48
52
52
52
52
52
50
50
50
51
51
51
51
51
51
51
51
IPEN
SBOREN
ADIF
—
PSPIF(1)
PSPIE(1)
PSPIP(1)
RCIF
RCIE
RCIP
TXIF
TXIE
TXIP
SSPIF
SSPIE
SSPIP
CCP1IF
TMR2IF
TMR1IF
TMR1IE
TMR1IP
PIE1
ADIE
CCP1IE TMR2IE
CCP1IP TMR2IP
IPR1
ADIP
TRISB
TRISC
TMR2
PR2
PORTB Data Direction Register
PORTC Data Direction Register
Timer2 Register
Timer2 Period Register
T2CON
CCPR1L
—
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0
Capture/Compare/PWM Register 1 Low Byte
CCPR1H Capture/Compare/PWM Register 1 High Byte
CCP1CON P1M1(1) P1M0(1)
DC1B1 DC1B0
CCPR2L Capture/Compare/PWM Register 2 Low Byte
CCPR2H Capture/Compare/PWM Register 2 High Byte
CCP2CON DC2B1 DC2B0
ECCP1AS ECCPASE ECCPAS2 ECCPAS1 ECCPAS0 PSSAC1 PSSAC0 PSSBD1(1) PSSBD0(1)
PWM1CON PRSEN
PDC6(1) PDC5(1) PDC4(1) PDC3(1) PDC2(1) PDC1(1) PDC0(1)
CCP1M3 CCP1M2 CCP1M1 CCP1M0
CCP2M3 CCP2M2 CCP2M1 CCP2M0
—
—
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PWM or Timer2.
Note 1: These bits are unimplemented on 28-pin devices; always maintain these bits clear.
DS39631E-page 146
© 2008 Microchip Technology Inc.
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